Commit 1f2a3c8f by Ian Lance Taylor Committed by Ian Lance Taylor

re PR target/22432 (Wrong code generation using MMX intrinsics on amd64)

./:	PR target/22432
	* combine.c (apply_distributive_law): Don't distribute across a
	vector mode subreg.
testsuite/:
	PR target/22432
	* gcc.target/i386/pr22432.c: New test.

From-SVN: r106555
parent d4a43a05
2005-11-05 Ian Lance Taylor <ian@airs.com>
PR target/22432
* combine.c (apply_distributive_law): Don't distribute across a
vector mode subreg.
2005-11-05 Kazu Hirata <kazu@codesourcery.com> 2005-11-05 Kazu Hirata <kazu@codesourcery.com>
* c-typeck.c, config/i386/netware.h, config/m32c/cond.md, * c-typeck.c, config/i386/netware.h, config/m32c/cond.md,
......
...@@ -8117,14 +8117,15 @@ apply_distributive_law (rtx x) ...@@ -8117,14 +8117,15 @@ apply_distributive_law (rtx x)
break; break;
case SUBREG: case SUBREG:
/* Non-paradoxical SUBREGs distributes over all operations, provided /* Non-paradoxical SUBREGs distributes over all operations,
the inner modes and byte offsets are the same, this is an extraction provided the inner modes and byte offsets are the same, this
of a low-order part, we don't convert an fp operation to int or is an extraction of a low-order part, we don't convert an fp
vice versa, and we would not be converting a single-word operation to int or vice versa, this is not a vector mode,
operation into a multi-word operation. The latter test is not and we would not be converting a single-word operation into a
required, but it prevents generating unneeded multi-word operations. multi-word operation. The latter test is not required, but
Some of the previous tests are redundant given the latter test, but it prevents generating unneeded multi-word operations. Some
are retained because they are required for correctness. of the previous tests are redundant given the latter test,
but are retained because they are required for correctness.
We produce the result slightly differently in this case. */ We produce the result slightly differently in this case. */
...@@ -8135,6 +8136,7 @@ apply_distributive_law (rtx x) ...@@ -8135,6 +8136,7 @@ apply_distributive_law (rtx x)
!= GET_MODE_CLASS (GET_MODE (SUBREG_REG (lhs)))) != GET_MODE_CLASS (GET_MODE (SUBREG_REG (lhs))))
|| (GET_MODE_SIZE (GET_MODE (lhs)) || (GET_MODE_SIZE (GET_MODE (lhs))
> GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs)))) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))))
|| VECTOR_MODE_P (GET_MODE (lhs))
|| GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))) > UNITS_PER_WORD) || GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))) > UNITS_PER_WORD)
return x; return x;
......
2005-11-05 Ian Lance Taylor <ian@airs.com>
PR target/22432
* gcc.target/i386/pr22432.c: New test.
2005-11-05 Richard Henderson <rth@redhat.com> 2005-11-05 Richard Henderson <rth@redhat.com>
* gcc.target/alpha/asm-1.c: Move from gcc.dg/asm-5.c. * gcc.target/alpha/asm-1.c: Move from gcc.dg/asm-5.c.
/* { dg-do compile } */
/* { dg-options "-O2 -mmmx" } */
/* { dg-final { scan-assembler-not "paddb" } } */
typedef int v2si __attribute__ ((__vector_size__ (8)));
typedef short v4hi __attribute__ ((__vector_size__ (8)));
typedef char v8qi __attribute__ ((__vector_size__ (8)));
int
foo (unsigned int *a, unsigned int *b)
{
long long i, j, k;
i = (long long) __builtin_ia32_vec_init_v2si (*a, 0);
j = (long long) __builtin_ia32_vec_init_v2si (*b, 0);
i = (long long) __builtin_ia32_punpcklbw ((v8qi) i, (v8qi) 0ll);
j = (long long) __builtin_ia32_punpcklbw ((v8qi) j, (v8qi) 0ll);
k = (long long) __builtin_ia32_paddw ((v4hi) i, (v4hi) j);
return __builtin_ia32_vec_ext_v2si ((v2si) k, 0);
}
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