Commit 1ee3b380 by Richard Sandiford

forwprop: Tweak choice of VEC_PERM_EXPR filler [PR92822]

For the 2s failures in the PR, we have a V4SF VEC_PERM_EXPR in
which the first two elements are duplicates of one element and
the other two are don't-care:

    v4sf_b = VEC_PERM_EXPR <v4sf_a, v4sf_a, { 1, 1, ?, ? }>;

The heuristic was to extend this with a blend:

    v4sf_b = VEC_PERM_EXPR <v4sf_a, v4sf_a, { 1, 1, 2, 3 }>;

but it seems better to extend a partial duplicate to a full duplicate:

    v4sf_b = VEC_PERM_EXPR <v4sf_a, v4sf_a, { 1, 1, 1, 1 }>;

Obviously this is still just a heuristic though.

I wondered whether to restrict this to two elements or more
but couldn't find any examples in which it made a difference.
Either way should be fine for the purposes of fixing this PR.

2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR tree-optimization/92822
	* tree-ssa-forwprop.c (simplify_vector_constructor): When filling
	out the don't-care elements of a vector whose significant elements
	are duplicates, make the don't-care elements duplicates too.
parent 6cedf5d8
2020-01-28 Richard Sandiford <richard.sandiford@arm.com> 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/92822
* tree-ssa-forwprop.c (simplify_vector_constructor): When filling
out the don't-care elements of a vector whose significant elements
are duplicates, make the don't-care elements duplicates too.
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/93434 PR tree-optimization/93434
* tree-predcom.c (split_data_refs_to_components): Record which * tree-predcom.c (split_data_refs_to_components): Record which
components have had aliasing loads removed. Prevent store-store components have had aliasing loads removed. Prevent store-store
......
...@@ -2455,16 +2455,26 @@ simplify_vector_constructor (gimple_stmt_iterator *gsi) ...@@ -2455,16 +2455,26 @@ simplify_vector_constructor (gimple_stmt_iterator *gsi)
it and its source indexes to make the permutation supported. it and its source indexes to make the permutation supported.
For now it mimics a blend. */ For now it mimics a blend. */
vec_perm_builder sel (refnelts, refnelts, 1); vec_perm_builder sel (refnelts, refnelts, 1);
bool all_same_p = true;
for (i = 0; i < elts.length (); ++i) for (i = 0; i < elts.length (); ++i)
sel.quick_push (elts[i].second + elts[i].first * refnelts); {
sel.quick_push (elts[i].second + elts[i].first * refnelts);
all_same_p &= known_eq (sel[i], sel[0]);
}
/* And fill the tail with "something". It's really don't care, /* And fill the tail with "something". It's really don't care,
and ideally we'd allow VEC_PERM to have a smaller destination and ideally we'd allow VEC_PERM to have a smaller destination
vector. As heuristic try to preserve a uniform orig[0] which vector. As a heuristic:
facilitates later pattern-matching VEC_PERM_EXPR to a
BIT_INSERT_EXPR. */ (a) if what we have so far duplicates a single element, make the
tail do the same
(b) otherwise preserve a uniform orig[0]. This facilitates
later pattern-matching of VEC_PERM_EXPR to a BIT_INSERT_EXPR. */
for (; i < refnelts; ++i) for (; i < refnelts; ++i)
sel.quick_push ((elts[0].second == 0 && elts[0].first == 0 sel.quick_push (all_same_p
? 0 : refnelts) + i); ? sel[0]
: (elts[0].second == 0 && elts[0].first == 0
? 0 : refnelts) + i);
vec_perm_indices indices (sel, orig[1] ? 2 : 1, refnelts); vec_perm_indices indices (sel, orig[1] ? 2 : 1, refnelts);
if (!can_vec_perm_const_p (TYPE_MODE (perm_type), indices)) if (!can_vec_perm_const_p (TYPE_MODE (perm_type), indices))
return false; return false;
......
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