Commit 1eb356b9 by Richard Henderson Committed by Richard Henderson

alpha.c (alpha_next_sequence_number): New.

	* config/alpha/alpha.c (alpha_next_sequence_number): New.
	(alpha_this_literal_sequence_number): New.
	(alpha_this_gpdisp_sequence_number): New.
	(some_operand, input_operand): Add HIGH.
	(local_symbolic_operand): New.
	(alpha_encode_section_info): New.
	(alpha_legitimate_address_p): Allow LO_SUM.
	(alpha_legitimize_address): Generate HIGH+LO_SUM.
	(alpha_expand_mov): Likewise.
	(secondary_reload_class): Check memory_operand not general_operand
	for FP_REGS test.
	(alpha_expand_unaligned_load): Force LO_SUM addresses into a register.
	(alpha_expand_unaligned_store): Likewise.
	(alpha_expand_unaligned_load_words): Likewise.
	(alpha_expand_unaligned_store_words): Likewise.
	(alpha_expand_block_clear): Likewise.
	(print_operand): Handle %#, %*, %H.
	(print_operand_address): Handle LO_SUM.
	(find_lo_sum): New.
	(alpha_does_function_need_gp): Use it.
	(alpha_expand_block_move): Fix signed compare warnings.
	(alpha_sa_mask, alpha_align_insns): Likewise.
	* config/alpha/alpha-protos.h: Update.
	* config/alpha/alpha.h (TARGET_EXPLICIT_RELOCS): New.
	(MASK_EXPLICIT_RELOCS): New.
	(TARGET_SWITCHES): Add -mexplicit-relocs.
	(EXTRA_CONSTRAINT): Add 'T'.
	(PREFERRED_RELOAD_CLASS): HIGH goes in GENERAL_REGS.
	(ASM_APP_ON, ASM_APP_OFF): Turn on and off asm macro expansion.
	(ENCODE_SECTION_INFO): Out line.
	(REDO_SECTION_INFO_P): New.
	(STRIP_NAME_ENCODING): New.
	(ASM_OUTPUT_LABELREF): New.
	(PRINT_OPERAND_PUNCT_VALID_P): Add #, *.
	(PREDICATE_CODES): Update.
	* config/alpha/alpha.md (divmodsi_internal_er, divmoddi_internal_er,
	call_osf_1_er_noreturn, call_osf_1_er, movdi_er_low, movdi_er_nofix,
	movdi_er_fix, prologue_ldgp_1_er, builtin_setjmp_receiver_sub_label_er,
	builtin_setjmp_receiver_er, exception_receiver_1_er,
	call_value_osf_1_er): New patterns.
	(sibcall_osf_1, sibcall_value_osf_1): Remove register alternative.
	(movqi, movhi, movsi): Add explicit $31 base register to lda.
	* config/alpha/elf.h (ASM_FILE_START): Set nomacro if explicit relocs.
	(FINAL_PRESCAN_INSN): New.

From-SVN: r45493
parent 7b95ee3d
2001-09-09 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.c (alpha_next_sequence_number): New.
(alpha_this_literal_sequence_number): New.
(alpha_this_gpdisp_sequence_number): New.
(some_operand, input_operand): Add HIGH.
(local_symbolic_operand): New.
(alpha_encode_section_info): New.
(alpha_legitimate_address_p): Allow LO_SUM.
(alpha_legitimize_address): Generate HIGH+LO_SUM.
(alpha_expand_mov): Likewise.
(secondary_reload_class): Check memory_operand not general_operand
for FP_REGS test.
(alpha_expand_unaligned_load): Force LO_SUM addresses into a register.
(alpha_expand_unaligned_store): Likewise.
(alpha_expand_unaligned_load_words): Likewise.
(alpha_expand_unaligned_store_words): Likewise.
(alpha_expand_block_clear): Likewise.
(print_operand): Handle %#, %*, %H.
(print_operand_address): Handle LO_SUM.
(find_lo_sum): New.
(alpha_does_function_need_gp): Use it.
(alpha_expand_block_move): Fix signed compare warnings.
(alpha_sa_mask, alpha_align_insns): Likewise.
* config/alpha/alpha-protos.h: Update.
* config/alpha/alpha.h (TARGET_EXPLICIT_RELOCS): New.
(MASK_EXPLICIT_RELOCS): New.
(TARGET_SWITCHES): Add -mexplicit-relocs.
(EXTRA_CONSTRAINT): Add 'T'.
(PREFERRED_RELOAD_CLASS): HIGH goes in GENERAL_REGS.
(ASM_APP_ON, ASM_APP_OFF): Turn on and off asm macro expansion.
(ENCODE_SECTION_INFO): Out line.
(REDO_SECTION_INFO_P): New.
(STRIP_NAME_ENCODING): New.
(ASM_OUTPUT_LABELREF): New.
(PRINT_OPERAND_PUNCT_VALID_P): Add #, *.
(PREDICATE_CODES): Update.
* config/alpha/alpha.md (divmodsi_internal_er, divmoddi_internal_er,
call_osf_1_er_noreturn, call_osf_1_er, movdi_er_low, movdi_er_nofix,
movdi_er_fix, prologue_ldgp_1_er, builtin_setjmp_receiver_sub_label_er,
builtin_setjmp_receiver_er, exception_receiver_1_er,
call_value_osf_1_er): New patterns.
(sibcall_osf_1, sibcall_value_osf_1): Remove register alternative.
(movqi, movhi, movsi): Add explicit $31 base register to lda.
* config/alpha/elf.h (ASM_FILE_START): Set nomacro if explicit relocs.
(FINAL_PRESCAN_INSN): New.
Sat Sep 8 22:00:55 CEST 2001 Jan Hubicka <jh@suse.cz> Sat Sep 8 22:00:55 CEST 2001 Jan Hubicka <jh@suse.cz>
* reg-stack.c (subst_stack_regs_pat): Fix fcmov reversal code. * reg-stack.c (subst_stack_regs_pat): Fix fcmov reversal code.
......
...@@ -54,6 +54,7 @@ extern int some_operand PARAMS ((rtx, enum machine_mode)); ...@@ -54,6 +54,7 @@ extern int some_operand PARAMS ((rtx, enum machine_mode));
extern int some_ni_operand PARAMS ((rtx, enum machine_mode)); extern int some_ni_operand PARAMS ((rtx, enum machine_mode));
extern int input_operand PARAMS ((rtx, enum machine_mode)); extern int input_operand PARAMS ((rtx, enum machine_mode));
extern int current_file_function_operand PARAMS ((rtx, enum machine_mode)); extern int current_file_function_operand PARAMS ((rtx, enum machine_mode));
extern int local_symbolic_operand PARAMS ((rtx, enum machine_mode));
extern int call_operand PARAMS ((rtx, enum machine_mode)); extern int call_operand PARAMS ((rtx, enum machine_mode));
extern int alpha_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int alpha_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int alpha_zero_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int alpha_zero_comparison_operator PARAMS ((rtx, enum machine_mode));
...@@ -146,4 +147,5 @@ extern rtx function_arg PARAMS ((CUMULATIVE_ARGS, enum machine_mode, ...@@ -146,4 +147,5 @@ extern rtx function_arg PARAMS ((CUMULATIVE_ARGS, enum machine_mode,
#endif #endif
extern void alpha_start_function PARAMS ((FILE *, const char *, tree)); extern void alpha_start_function PARAMS ((FILE *, const char *, tree));
extern void alpha_end_function PARAMS ((FILE *, const char *, tree)); extern void alpha_end_function PARAMS ((FILE *, const char *, tree));
extern void alpha_encode_section_info PARAMS ((tree));
#endif /* TREE CODE */ #endif /* TREE CODE */
...@@ -158,6 +158,10 @@ extern enum alpha_fp_trap_mode alpha_fptm; ...@@ -158,6 +158,10 @@ extern enum alpha_fp_trap_mode alpha_fptm;
#define MASK_CIX (1 << 11) #define MASK_CIX (1 << 11)
#define TARGET_CIX (target_flags & MASK_CIX) #define TARGET_CIX (target_flags & MASK_CIX)
/* This means use !literal style explicit relocations. */
#define MASK_EXPLICIT_RELOCS (1 << 12)
#define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
/* This means that the processor is an EV5, EV56, or PCA56. /* This means that the processor is an EV5, EV56, or PCA56.
Unlike alpha_cpu this is not affected by -mtune= setting. */ Unlike alpha_cpu this is not affected by -mtune= setting. */
#define MASK_CPU_EV5 (1 << 28) #define MASK_CPU_EV5 (1 << 28)
...@@ -227,6 +231,9 @@ extern enum alpha_fp_trap_mode alpha_fptm; ...@@ -227,6 +231,9 @@ extern enum alpha_fp_trap_mode alpha_fptm;
{"no-fix", -MASK_FIX, ""}, \ {"no-fix", -MASK_FIX, ""}, \
{"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \ {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
{"no-cix", -MASK_CIX, ""}, \ {"no-cix", -MASK_CIX, ""}, \
{"explicit-relocs", MASK_EXPLICIT_RELOCS, \
N_("Emit code using explicit relocation directives")}, \
{"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
{"", TARGET_DEFAULT | TARGET_CPU_DEFAULT, ""} } {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT, ""} }
#define TARGET_DEFAULT MASK_FP|MASK_FPREGS #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
...@@ -792,6 +799,7 @@ enum reg_class { NO_REGS, PV_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS, ...@@ -792,6 +799,7 @@ enum reg_class { NO_REGS, PV_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
: (C) == 'R' ? current_file_function_operand (OP, Pmode) \ : (C) == 'R' ? current_file_function_operand (OP, Pmode) \
: (C) == 'S' ? (GET_CODE (OP) == CONST_INT \ : (C) == 'S' ? (GET_CODE (OP) == CONST_INT \
&& (unsigned HOST_WIDE_INT) INTVAL (OP) < 64) \ && (unsigned HOST_WIDE_INT) INTVAL (OP) < 64) \
: (C) == 'T' ? GET_CODE (OP) == HIGH \
: 0) : 0)
/* Given an rtx X being reloaded into a reg required to be /* Given an rtx X being reloaded into a reg required to be
...@@ -803,8 +811,9 @@ enum reg_class { NO_REGS, PV_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS, ...@@ -803,8 +811,9 @@ enum reg_class { NO_REGS, PV_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
register via memory. */ register via memory. */
#define PREFERRED_RELOAD_CLASS(X, CLASS) \ #define PREFERRED_RELOAD_CLASS(X, CLASS) \
(CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \ (GET_CODE (X) == HIGH ? GENERAL_REGS \
? ((CLASS) == FLOAT_REGS || (CLASS) == NO_REGS ? NO_REGS : GENERAL_REGS)\ : CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
? ((CLASS) == FLOAT_REGS || (CLASS) == NO_REGS ? NO_REGS : GENERAL_REGS) \
: (CLASS)) : (CLASS))
/* Loading and storing HImode or QImode values to and from memory /* Loading and storing HImode or QImode values to and from memory
...@@ -1737,13 +1746,11 @@ do { \ ...@@ -1737,13 +1746,11 @@ do { \
/* Output to assembler file text saying following lines /* Output to assembler file text saying following lines
may contain character constants, extra white space, comments, etc. */ may contain character constants, extra white space, comments, etc. */
#define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
#define ASM_APP_ON ""
/* Output to assembler file text saying following lines /* Output to assembler file text saying following lines
no longer contain unusual constructs. */ no longer contain unusual constructs. */
#define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
#define ASM_APP_OFF ""
#define TEXT_SECTION_ASM_OP "\t.text" #define TEXT_SECTION_ASM_OP "\t.text"
...@@ -1785,13 +1792,29 @@ literal_section () \ ...@@ -1785,13 +1792,29 @@ literal_section () \
#define READONLY_DATA_SECTION literal_section #define READONLY_DATA_SECTION literal_section
/* If we are referencing a function that is static, make the SYMBOL_REF /* Define this macro if references to a symbol must be treated differently
special. We use this to see indicate we can branch to this function depending on something about the variable or function named by the symbol
without setting PV or restoring GP. */ (such as what section it is in). */
#define ENCODE_SECTION_INFO(DECL) alpha_encode_section_info (DECL)
/* If a variable is weakened, made one only or moved into a different
section, it may be necessary to redo the section info to move the
variable out of sdata. */
#define REDO_SECTION_INFO_P(DECL) \
((TREE_CODE (DECL) == VAR_DECL) \
&& (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL) \
|| DECL_SECTION_NAME (DECL) != 0))
#define ENCODE_SECTION_INFO(DECL) \ #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \ do { \
SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; (VAR) = (SYMBOL_NAME); \
if ((VAR)[0] == '@') \
(VAR) += 2; \
if ((VAR)[0] == '*') \
(VAR)++; \
} while (0)
/* How to refer to registers in assembler output. /* How to refer to registers in assembler output.
This sequence is indexed by compiler's hard-register-number (see above). */ This sequence is indexed by compiler's hard-register-number (see above). */
...@@ -1810,6 +1833,20 @@ literal_section () \ ...@@ -1810,6 +1833,20 @@ literal_section () \
#define DBX_REGISTER_NUMBER(REGNO) (REGNO) #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
/* Strip name encoding when emitting labels. */
#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
do { \
const char *name_ = NAME; \
if (*name_ == '@') \
name_ += 2; \
if (*name_ == '*') \
name_++; \
else \
fputs (user_label_prefix, STREAM); \
fputs (name_, STREAM); \
} while (0)
/* This is how to output the definition of a user-level label named NAME, /* This is how to output the definition of a user-level label named NAME,
such as the label on a static function or variable NAME. */ such as the label on a static function or variable NAME. */
...@@ -2089,7 +2126,8 @@ do { \ ...@@ -2089,7 +2126,8 @@ do { \
*/ */
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~') ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
|| (CODE) == '#' || (CODE) == '*')
/* Print a memory address as an operand to reference that memory location. */ /* Print a memory address as an operand to reference that memory location. */
...@@ -2121,11 +2159,12 @@ do { \ ...@@ -2121,11 +2159,12 @@ do { \
{"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
{"fp0_operand", {CONST_DOUBLE}}, \ {"fp0_operand", {CONST_DOUBLE}}, \
{"current_file_function_operand", {SYMBOL_REF}}, \ {"current_file_function_operand", {SYMBOL_REF}}, \
{"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
{"call_operand", {REG, SYMBOL_REF}}, \ {"call_operand", {REG, SYMBOL_REF}}, \
{"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
SYMBOL_REF, CONST, LABEL_REF}}, \ SYMBOL_REF, CONST, LABEL_REF, HIGH, LO_SUM}}, \
{"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
SYMBOL_REF, CONST, LABEL_REF}}, \ SYMBOL_REF, CONST, LABEL_REF, HIGH, LO_SUM}}, \
{"some_ni_operand", {SUBREG, REG, MEM}}, \ {"some_ni_operand", {SUBREG, REG, MEM}}, \
{"aligned_memory_operand", {MEM}}, \ {"aligned_memory_operand", {MEM}}, \
{"unaligned_memory_operand", {MEM}}, \ {"unaligned_memory_operand", {MEM}}, \
......
...@@ -58,6 +58,8 @@ do { \ ...@@ -58,6 +58,8 @@ do { \
} \ } \
fprintf (FILE, "\t.set noat\n"); \ fprintf (FILE, "\t.set noat\n"); \
fprintf (FILE, "\t.set noreorder\n"); \ fprintf (FILE, "\t.set noreorder\n"); \
if (TARGET_EXPLICIT_RELOCS) \
fprintf (FILE, "\t.set nomacro\n"); \
if (TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) \ if (TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) \
{ \ { \
fprintf (FILE, "\t.arch %s\n", \ fprintf (FILE, "\t.arch %s\n", \
...@@ -591,3 +593,11 @@ void FN () \ ...@@ -591,3 +593,11 @@ void FN () \
only EH sections. */ only EH sections. */
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
(((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4) (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
/* If defined, a C statement to be executed just prior to the output of
assembler code for INSN. */
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
(alpha_this_literal_sequence_number = 0, \
alpha_this_gpdisp_sequence_number = 0)
extern int alpha_this_literal_sequence_number;
extern int alpha_this_gpdisp_sequence_number;
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