Commit 1d4047e0 by Richard Sandiford Committed by Richard Sandiford

mips.md: Add imadd type.

	* config/mips/mips.md: Add imadd type.  Update scheduler description
	to use imadd as well as imul.
	(*mul_acc_si, *madsi): Change imul alternatives to imadd.
	(*mul_acc_di, *mul_acc_64bit_di): Likewise.
	(*mul_sub_si): Likewise for first alternative.  Change second
	alternative from imul to multi.

From-SVN: r55321
parent 594bb0e7
2002-07-08 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.md: Add imadd type. Update scheduler description
to use imadd as well as imul.
(*mul_acc_si, *madsi): Change imul alternatives to imadd.
(*mul_acc_di, *mul_acc_64bit_di): Likewise.
(*mul_sub_si): Likewise for first alternative. Change second
alternative from imul to multi.
2002-07-07 Neil Booth <neil@daikokuya.co.uk> 2002-07-07 Neil Booth <neil@daikokuya.co.uk>
* c-common.c (c_common_post_options): Update prototype; * c-common.c (c_common_post_options): Update prototype;
......
...@@ -68,6 +68,7 @@ ...@@ -68,6 +68,7 @@
;; arith integer arithmetic instruction ;; arith integer arithmetic instruction
;; darith double precision integer arithmetic instructions ;; darith double precision integer arithmetic instructions
;; imul integer multiply ;; imul integer multiply
;; imadd integer multiply-add
;; idiv integer divide ;; idiv integer divide
;; icmp integer compare ;; icmp integer compare
;; fadd floating point add/subtract ;; fadd floating point add/subtract
...@@ -83,7 +84,7 @@ ...@@ -83,7 +84,7 @@
;; nop no operation ;; nop no operation
(define_attr "type" (define_attr "type"
"unknown,branch,jump,call,load,store,move,xfer,hilo,arith,darith,imul,idiv,icmp,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,multi,nop" "unknown,branch,jump,call,load,store,move,xfer,hilo,arith,darith,imul,imadd,idiv,icmp,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,multi,nop"
(const_string "unknown")) (const_string "unknown"))
;; Main data type used by the insn ;; Main data type used by the insn
...@@ -222,7 +223,7 @@ ...@@ -222,7 +223,7 @@
1 3) 1 3)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (and (eq_attr "type" "imul,imadd")
(eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4300,r5000")) (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4300,r5000"))
17 17) 17 17)
...@@ -237,39 +238,39 @@ ...@@ -237,39 +238,39 @@
1 5) 1 5)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (eq_attr "cpu" "r3000,r3900")) (and (eq_attr "type" "imul,imadd") (eq_attr "cpu" "r3000,r3900"))
12 12) 12 12)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (eq_attr "cpu" "r4000,r4600")) (and (eq_attr "type" "imul,imadd") (eq_attr "cpu" "r4000,r4600"))
10 10) 10 10)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (eq_attr "cpu" "r4650")) (and (eq_attr "type" "imul,imadd") (eq_attr "cpu" "r4650"))
4 4) 4 4)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (and (eq_attr "type" "imul,imadd")
(and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100"))) (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100")))
1 1) 1 1)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (and (eq_attr "type" "imul,imadd")
(and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100"))) (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100")))
4 4) 4 4)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (and (eq_attr "type" "imul,imadd")
(and (eq_attr "mode" "SI") (eq_attr "cpu" "r4300,r5000"))) (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4300,r5000")))
5 5) 5 5)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (and (eq_attr "type" "imul,imadd")
(and (eq_attr "mode" "DI") (eq_attr "cpu" "r4300"))) (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4300")))
8 8) 8 8)
(define_function_unit "imuldiv" 1 0 (define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul") (and (eq_attr "type" "imul,imadd")
(and (eq_attr "mode" "DI") (eq_attr "cpu" "r5000"))) (and (eq_attr "mode" "DI") (eq_attr "cpu" "r5000")))
9 9) 9 9)
...@@ -1868,7 +1869,7 @@ ...@@ -1868,7 +1869,7 @@
return \"#\"; return \"#\";
return madd[which_alternative]; return madd[which_alternative];
}" }"
[(set_attr "type" "imul,imul,multi") [(set_attr "type" "imadd,imadd,multi")
(set_attr "mode" "SI") (set_attr "mode" "SI")
(set_attr "length" "4,4,8")]) (set_attr "length" "4,4,8")])
...@@ -1932,7 +1933,7 @@ ...@@ -1932,7 +1933,7 @@
return \"#\"; return \"#\";
return \"msub\\t%2,%3\"; return \"msub\\t%2,%3\";
}" }"
[(set_attr "type" "imul,imul,multi") [(set_attr "type" "imadd,multi,multi")
(set_attr "mode" "SI") (set_attr "mode" "SI")
(set_attr "length" "4,8,8")]) (set_attr "length" "4,8,8")])
...@@ -2241,7 +2242,7 @@ ...@@ -2241,7 +2242,7 @@
(clobber (match_scratch:SI 4 "=a"))] (clobber (match_scratch:SI 4 "=a"))]
"TARGET_MAD" "TARGET_MAD"
"mad\\t%1,%2" "mad\\t%1,%2"
[(set_attr "type" "imul") [(set_attr "type" "imadd")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*mul_acc_di" (define_insn "*mul_acc_di"
...@@ -2262,7 +2263,7 @@ ...@@ -2262,7 +2263,7 @@
else else
return \"madu\\t%1,%2\"; return \"madu\\t%1,%2\";
}" }"
[(set_attr "type" "imul") [(set_attr "type" "imadd")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*mul_acc_64bit_di" (define_insn "*mul_acc_64bit_di"
...@@ -2284,7 +2285,7 @@ ...@@ -2284,7 +2285,7 @@
else else
return \"madu\\t%1,%2\"; return \"madu\\t%1,%2\";
}" }"
[(set_attr "type" "imul") [(set_attr "type" "imadd")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
;; Floating point multiply accumulate instructions. ;; Floating point multiply accumulate instructions.
......
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