Commit 1d338e84 by Uros Bizjak Committed by Uros Bizjak

i386.md (Load+RegOp to Mov+MemOp peephole2): Use SWI mode iterator.

	* config/i386/i386.md (Load+RegOp to Mov+MemOp peephole2):
	Use SWI mode iterator.  Use general_reg_operand predicate.
	(Load+RegOp to Mov+MemOp peephole2 with vector regs): Split
	peephole to MMX and SSE part.  Use mmx_reg_operand and sse_reg_operand
	predicates.

From-SVN: r235620
parent 54170399
2016-04-29 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (Load+RegOp to Mov+MemOp peephole2):
Use SWI mode iterator. Use general_reg_operand predicate.
(Load+RegOp to Mov+MemOp peephole2 with vector regs): Split
peephole to MMX and SSE part. Use mmx_reg_operand and sse_reg_operand
predicates.
2016-04-29 Jakub Jelinek <jakub@redhat.com>
PR middle-end/70843
......
......@@ -17905,41 +17905,49 @@
(match_op_dup 3 [(match_dup 2) (match_dup 0)]))
(clobber (reg:CC FLAGS_REG))])])
;; Prefer Load+RegOp to Mov+MemOp. Watch out for cases when the memory address
;; refers to the destination of the load!
;; Prefer Load+RegOp to Mov+MemOp. Watch out for cases when
;; the memory address refers to the destination of the load!
(define_peephole2
[(set (match_operand:SI 0 "register_operand")
(match_operand:SI 1 "register_operand"))
[(set (match_operand:SWI 0 "general_reg_operand")
(match_operand:SWI 1 "general_reg_operand"))
(parallel [(set (match_dup 0)
(match_operator:SI 3 "commutative_operator"
[(match_dup 0)
(match_operand:SI 2 "memory_operand")]))
(clobber (reg:CC FLAGS_REG))])]
(match_operator:SWI 3 "commutative_operator"
[(match_dup 0)
(match_operand:SWI 2 "memory_operand")]))
(clobber (reg:CC FLAGS_REG))])]
"REGNO (operands[0]) != REGNO (operands[1])
&& GENERAL_REGNO_P (REGNO (operands[0]))
&& GENERAL_REGNO_P (REGNO (operands[1]))"
&& (<MODE>mode != QImode
|| any_QIreg_operand (operands[1], QImode))"
[(set (match_dup 0) (match_dup 4))
(parallel [(set (match_dup 0)
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))
(clobber (reg:CC FLAGS_REG))])]
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))
(clobber (reg:CC FLAGS_REG))])]
"operands[4] = replace_rtx (operands[2], operands[0], operands[1], true);")
(define_peephole2
[(set (match_operand 0 "register_operand")
(match_operand 1 "register_operand"))
[(set (match_operand 0 "mmx_reg_operand")
(match_operand 1 "mmx_reg_operand"))
(set (match_dup 0)
(match_operator 3 "commutative_operator"
[(match_dup 0)
(match_operand 2 "memory_operand")]))]
"REGNO (operands[0]) != REGNO (operands[1])
&& ((MMX_REGNO_P (REGNO (operands[0]))
&& MMX_REGNO_P (REGNO (operands[1])))
|| (SSE_REGNO_P (REGNO (operands[0]))
&& SSE_REGNO_P (REGNO (operands[1]))))"
(match_operator 3 "commutative_operator"
[(match_dup 0)
(match_operand 2 "memory_operand")]))]
"REGNO (operands[0]) != REGNO (operands[1])"
[(set (match_dup 0) (match_dup 2))
(set (match_dup 0)
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))])
(define_peephole2
[(set (match_operand 0 "sse_reg_operand")
(match_operand 1 "sse_reg_operand"))
(set (match_dup 0)
(match_operator 3 "commutative_operator"
[(match_dup 0)
(match_operand 2 "memory_operand")]))]
"REGNO (operands[0]) != REGNO (operands[1])"
[(set (match_dup 0) (match_dup 2))
(set (match_dup 0)
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))])
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))])
; Don't do logical operations with memory outputs
;
......
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