sse.md (vec_widen_smult_hi_v8hi, [...]): Macroize using VI2_AVX2 mode iterator…

sse.md (vec_widen_smult_hi_v8hi, [...]): Macroize using VI2_AVX2 mode iterator and any_extend code iterator.

	* config/i386/sse.md (vec_widen_smult_hi_v8hi,
	vec_widen_smult_lo_v8hi, vec_widen_umult_hi_v8hi,
	vec_widen_umult_lo_v8hi): Macroize using VI2_AVX2
	mode iterator and any_extend code iterator.
	(vec_widen_<s>mult_hi_v8si, vec_widen_<s>mult_lo_v8si): New
	expanders.
	(vec_widen_smult_hi_v4si, vec_widen_smult_lo_v4si): Enable
	also for TARGET_SSE4_1 using pmuldq insn.
	(sdot_prodv8hi): Macroize using VI2_AVX2 iterator.
	(sse2_sse4_1): New code attr.
	(udot_prodv4si): Macroize using any_extend code iterator.
	(<s>dot_prodv8si): New expander.

	* gcc.target/i386/sse2-mul-1.c: New test.
	* gcc.target/i386/sse4_1-mul-1.c: New test.
	* gcc.target/i386/avx-mul-1.c: New test.
	* gcc.target/i386/xop-mul-1.c: New test.
	* gcc.target/i386/avx2-mul-1.c: New test.

From-SVN: r180005

gcc/ChangeLog

+2011-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/i386/sse.md (vec_widen_smult_hi_v8hi,
+	vec_widen_smult_lo_v8hi, vec_widen_umult_hi_v8hi,
+	vec_widen_umult_lo_v8hi): Macroize using VI2_AVX2
+	mode iterator and any_extend code iterator.
+	(vec_widen_<s>mult_hi_v8si, vec_widen_<s>mult_lo_v8si): New
+	expanders.
+	(vec_widen_smult_hi_v4si, vec_widen_smult_lo_v4si): Enable
+	also for TARGET_SSE4_1 using pmuldq insn.
+	(sdot_prodv8hi): Macroize using VI2_AVX2 iterator.
+	(sse2_sse4_1): New code attr.
+	(udot_prodv4si): Macroize using any_extend code iterator.
+	(<s>dot_prodv8si): New expander.
+
 2011-10-14  Yakovlev Vladimir  <vladimir.b.yakovlev@intel.com>
 
 	* config/i386/i386.c (atom_cost): Changed cost for loading

gcc/testsuite/ChangeLog

+2011-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	* gcc.target/i386/sse2-mul-1.c: New test.
+	* gcc.target/i386/sse4_1-mul-1.c: New test.
+	* gcc.target/i386/avx-mul-1.c: New test.
+	* gcc.target/i386/xop-mul-1.c: New test.
+	* gcc.target/i386/avx2-mul-1.c: New test.
+
 2011-10-14  Jason Merrill  <jason@redhat.com>
 
 	PR c++/50563

gcc/testsuite/gcc.target/i386/avx-mul-1.c

+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
+/* { dg-options "-O3 -mavx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "avx-check.h"
+#endif
+
+#ifndef TEST
+#define TEST avx_test
+#endif
+
+#include "sse2-mul-1.c"

gcc/testsuite/gcc.target/i386/avx2-mul-1.c

+/* { dg-do run } */
+/* { dg-require-effective-target avx2 } */
+/* { dg-options "-O3 -mavx2" } */
+
+#ifndef CHECK_H
+#define CHECK_H "avx2-check.h"
+#endif
+
+#ifndef TEST
+#define TEST avx2_test
+#endif
+
+#include "sse2-mul-1.c"

gcc/testsuite/gcc.target/i386/sse2-mul-1.c

+/* { dg-do run } */
+/* { dg-require-effective-target sse2 } */
+/* { dg-options "-O3 -msse2" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse2-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse2_test
+#endif
+
+#include CHECK_H
+
+#include <stdlib.h>
+
+#define N 512
+static short a1[N], a2[N], a3[N];
+static unsigned short b1[N], b2[N], b3[N];
+static int c1[N], c2[N], c3[N];
+static unsigned int d1[N], d2[N], d3[N];
+static long long e1[N], e2[N], e3[N];
+static unsigned long long g1[N], g2[N], g3[N];
+
+__attribute__((noinline, noclone)) void
+f1 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    a1[i] = a2[i] * a3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f2 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    b1[i] = b2[i] * b3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f3 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    c1[i] = c2[i] * c3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f4 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    d1[i] = d2[i] * d3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f5 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    e1[i] = e2[i] * e3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f6 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    g1[i] = g2[i] * g3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f7 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    c1[i] = a2[i] * a3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f8 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    d1[i] = (unsigned int) b2[i] * b3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f9 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    e1[i] = (long long) c2[i] * (long long) c3[i];
+}
+
+__attribute__((noinline, noclone)) void
+f10 (void)
+{
+  int i;
+  for (i = 0; i < N; ++i)
+    g1[i] = (unsigned long long) d2[i] * (unsigned long long) d3[i];
+}
+
+__attribute__((noinline, noclone)) int
+f11 (void)
+{
+  int i, r = 0;
+  for (i = 0; i < N; ++i)
+    r += a2[i] * a3[i];
+  return r;
+}
+
+__attribute__((noinline, noclone)) unsigned int
+f12 (void)
+{
+  int i;
+  unsigned r = 0;
+  for (i = 0; i < N; ++i)
+    r += (unsigned int) b2[i] * b3[i];
+  return r;
+}
+
+__attribute__((noinline, noclone)) long long
+f13 (void)
+{
+  int i;
+  long long r = 0;
+  for (i = 0; i < N; ++i)
+    r += (long long) c2[i] * (long long) c3[i];
+  return r;
+}
+
+__attribute__((noinline, noclone)) unsigned long long
+f14 (void)
+{
+  int i;
+  unsigned long long r = 0;
+  for (i = 0; i < N; ++i)
+    r += (unsigned long long) d2[i] * (unsigned long long) d3[i];
+  return r;
+}
+
+static void
+TEST (void)
+{
+  int i;
+  int s1 = 0;
+  unsigned int s2 = 0;
+  long long s3 = 0;
+  unsigned long long s4 = 0;
+  for (i = 0; i < N; ++i)
+    {
+      asm volatile ("" : : "r" (&s1) : "memory");
+      asm volatile ("" : : "r" (&s2) : "memory");
+      asm volatile ("" : : "r" (&s3) : "memory");
+      asm volatile ("" : : "r" (&s4) : "memory");
+      b2[i] = (int) random ();
+      b3[i] = (int) random ();
+      a2[i] = b2[i];
+      a3[i] = b3[i];
+      d2[i] = (((int) random ()) << 16) | b2[i];
+      d3[i] = (((int) random ()) << 16) | b3[i];
+      c2[i] = d2[i];
+      c3[i] = d3[i];
+      s1 += a2[i] * a3[i];
+      s2 += (unsigned int) b2[i] * b3[i];
+      s3 += (long long) c2[i] * (long long) c3[i];
+      s4 += (unsigned long long) d2[i] * (unsigned long long) d3[i];
+    }
+  f1 ();
+  f2 ();
+  f3 ();
+  f4 ();
+  f5 ();
+  f6 ();
+  for (i = 0; i < N; ++i)
+    {
+      if (a1[i] != (short) (a2[i] * a3[i]))
+	abort ();
+      if (b1[i] != (unsigned short) (b2[i] * b3[i]))
+	abort ();
+      if (c1[i] != c2[i] * c3[i])
+	abort ();
+      if (d1[i] != d2[i] * d3[i])
+	abort ();
+      if (e1[i] != e2[i] * e3[i])
+	abort ();
+      if (g1[i] != g2[i] * g3[i])
+	abort ();
+    }
+  f7 ();
+  f8 ();
+  f9 ();
+  f10 ();
+  for (i = 0; i < N; ++i)
+    {
+      if (c1[i] != a2[i] * a3[i])
+	abort ();
+      if (d1[i] != b2[i] * b3[i])
+	abort ();
+      if (e1[i] != (long long) c2[i] * (long long) c3[i])
+	abort ();
+      if (g1[i] != (unsigned long long) d2[i] * (unsigned long long) d3[i])
+	abort ();
+    }
+  if (f11 () != s1 || f12 () != s2 || f13 () != s3 || f14 () != s4)
+    abort ();
+}

gcc/testsuite/gcc.target/i386/sse4_1-mul-1.c

+/* { dg-do run } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-O3 -msse4.1" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include "sse2-mul-1.c"

gcc/testsuite/gcc.target/i386/xop-mul-1.c

+/* { dg-do run } */
+/* { dg-require-effective-target xop } */
+/* { dg-options "-O3 -mxop" } */
+
+#ifndef CHECK_H
+#define CHECK_H "xop-check.h"
+#endif
+
+#ifndef TEST
+#define TEST xop_test
+#endif
+
+#include "sse2-mul-1.c"