mips.md (andsi3): Force operand 1 to a register too.

* config/mips/mips.md (andsi3) [TARGET_MIPS16]: Force operand 1 to
a register too.
(anddi3, iorsi3): Likewise.

From-SVN: r50988

gcc/ChangeLog

 2002-03-18  Alexandre Oliva  <aoliva@redhat.com>
 
+	* config/mips/mips.md (andsi3) [TARGET_MIPS16]: Force operand 1 to
+	a register too.
+	(anddi3, iorsi3): Likewise.
+
 	* config/mips/mips.h (ENCODE_SECTION_INFO) [TARGET_MIPS16]: Don't
 	use %gprel for symbols that are going to be placed in linkonce
 	sections.

gcc/config/mips/mips.md

@@ -3333,7 +3333,10 @@ move\\t%0,%z4\\n\\
   "
 {
   if (TARGET_MIPS16)
-    operands[2] = force_reg (SImode, operands[2]);
+    {
+      operands[1] = force_reg (SImode, operands[1]);
+      operands[2] = force_reg (SImode, operands[2]);
+    }
 }")
 
 (define_insn ""
@@ -3364,7 +3367,10 @@ move\\t%0,%z4\\n\\
   "
 {
   if (TARGET_MIPS16)
-    operands[2] = force_reg (DImode, operands[2]);
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      operands[2] = force_reg (DImode, operands[2]);
+    }
 }")
 
 (define_insn ""
@@ -3436,7 +3442,10 @@ move\\t%0,%z4\\n\\
   "
 {
   if (TARGET_MIPS16)
-    operands[2] = force_reg (SImode, operands[2]);
+    {
+      operands[1] = force_reg (SImode, operands[1]);
+      operands[2] = force_reg (SImode, operands[2]);
+    }
 }")
 
 (define_insn ""