Commit 1af21224 by Matthew Wahab Committed by Matthew Wahab

[ARM] Fix, add tests for FP16 aapcs.

testsuite/
	* gcc.target/arm/aapcs/neon-vect10.c: Require
	-mfloat-ab=hard.  Replace arm_neon_fp16_ok with arm_neon_fp16_hw.
	* gcc.target/arm/aapcs/neon-vect9.c: Likewise.
	* gcc.target/arm/aapcs/vfp18.c: Likewise.
	* gcc.target/arm/aapcs/vfp19.c: Likewise.
	* gcc.target/arm/aapcs/vfp20.c: Likewise.
	* gcc.target/arm/aapcs/vfp21.c: Likewise.
	* gcc.target/arm/fp16-aapcs-1.c: Require
	-mfloat-ab=hard.  Also simplify the test.
	* gcc.target/arm/fp16-aapcs-2.c: New.

From-SVN: r237849
parent abb67622
2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/aapcs/neon-vect10.c: Require
-mfloat-ab=hard. Replace arm_neon_fp16_ok with arm_neon_fp16_hw.
* gcc.target/arm/aapcs/neon-vect9.c: Likewise.
* gcc.target/arm/aapcs/vfp18.c: Likewise.
* gcc.target/arm/aapcs/vfp19.c: Likewise.
* gcc.target/arm/aapcs/vfp20.c: Likewise.
* gcc.target/arm/aapcs/vfp21.c: Likewise.
* gcc.target/arm/fp16-aapcs-1.c: Require
-mfloat-ab=hard. Also simplify the test.
* gcc.target/arm/fp16-aapcs-2.c: New.
2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
* lib/target-supports.exp (add_options_for_arm_fp16): Reword
comment.
(add_options_for_arm_fp16_ieee): New.
......
/* Test AAPCS layout (VFP variant for Neon types) */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_neon_fp16_ok } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_neon_fp16_hw } */
/* { dg-add-options arm_neon_fp16 } */
#ifndef IN_FRAMEWORK
......
/* Test AAPCS layout (VFP variant for Neon types) */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_neon_fp16_ok } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_neon_fp16_hw } */
/* { dg-add-options arm_neon_fp16 } */
#ifndef IN_FRAMEWORK
......
/* Test AAPCS layout (VFP variant) */
/* Test AAPCS layout (VFP variant) */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_neon_fp16_ok } */
/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_hw } */
/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
......
/* Test AAPCS layout (VFP variant) */
/* Test AAPCS layout (VFP variant) */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_neon_fp16_ok } */
/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_hw } */
/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
......
/* Test AAPCS layout (VFP variant) */
/* Test AAPCS layout (VFP variant) */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_neon_fp16_ok } */
/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_hw } */
/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
......
/* Test AAPCS layout (VFP variant) */
/* Test AAPCS layout (VFP variant) */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_neon_fp16_ok } */
/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
/* { dg-do run { target arm_eabi } } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_hw } */
/* { dg-add-options arm_fp16_ieee } */
#ifndef IN_FRAMEWORK
#define VFP
......
/* { dg-do compile } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_ok } */
/* { dg-options "-mfp16-format=ieee -O2" } */
/* { dg-add-options arm_fp16 } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_fp16_ieee } */
/* Test __fp16 arguments and return value in registers. */
/* Test __fp16 arguments and return value in registers (hard-float). */
__fp16 F (__fp16 a, __fp16 b, __fp16 c)
void
swap (__fp16, __fp16);
__fp16
F (__fp16 a, __fp16 b, __fp16 c)
{
if (a == b)
return c;
return a;
swap (b, a);
return c;
}
/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s0} 1 } } */
/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s1} 1 } } */
/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 1 } } */
/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } } */
/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } } */
/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } } */
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_ok } */
/* { dg-options "-mfloat-abi=softfp -O2" } */
/* { dg-add-options arm_fp16_ieee } */
/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
/* Test __fp16 arguments and return value in registers (softfp). */
void
swap (__fp16, __fp16);
__fp16
F (__fp16 a, __fp16 b, __fp16 c)
{
swap (b, a);
return c;
}
/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */
/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */
/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */
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