Commit 1a8c13b3 by Uros Bizjak Committed by Uros Bizjak

s390.md (UNSPEC_MB): Rename from UNSPECV_MB.

	* config/s390/s390.md (UNSPEC_MB): Rename from UNSPECV_MB.
	(memory_barrier): Expand as unspec instead of unspec_volatile.
	Remove mem:BLK from insn operands.  Use Pmode scratch register.
	(*memory_barrier): Define as unspec instead of unspec_volatile.
	Use (match_dup 0) as input operand.

	* config/sparc/sparc.md (UNSPEC_MEMBAR): Rename from UNSPECV_MEMBAR.
	* config/sparc/sync.md (memory_barrier): Expand as unspec instead of
	unspec_volatile.  Remove mem:BLK from insn operands.  Use Pmode
	scratch register.  Remove operand 1.
	(*stbar): Define as unspec instead of unspec_volatile.
	Use (match_dup 0) as input operand, remove (const_int 8).
	(*membar): Define as unspec instead of unspec_volatile.
	Use (match_dup 0) as input operand, remove input operand 2.

	* config/xtensa/xtensa.md (UNSPEC_MEMW): Rename from UNSPECV_MEMW.
	(memory_barrier): Expand as unspec instead of unspec_volatile.
	Remove mem:BLK from insn operands.  Use Pmode scratch register.
	(*memory_barrier): Define as unspec instead of unspec_volatile.
	Use (match_dup 0) as input operand.

	* config/ia64/sync.md (memory_barrier): Redefine as expander pattern.
	Remove mem:BLK from insn operands.  Use Pmode scratch register.
	Set volatile flag on operand 0.
	(*memory_barrier): New insn pattern.

	* config/rs6000/sync.md (memory_barrier): Remove mem:BLK from
	insn operands.
	(*memory_barrier): Use (match_dup 0) as input operand.

	* config/mips/sync.md (memory_barrier): Redefine as expander pattern.
	Remove mem:BLK from insn operands.  Use Pmode scratch register.
	Set volatile flag on operand 0.
	(*memory_barrier): New insn pattern.

	* config/alpha/sync.md (*memory_barrier): Rename from *mb_internal.

From-SVN: r143047
parent 3aa37f1e
2009-01-04 Uros Bizjak <ubizjak@gmail.com>
* config/s390/s390.md (UNSPEC_MB): Rename from UNSPECV_MB.
(memory_barrier): Expand as unspec instead of unspec_volatile.
Remove mem:BLK from insn operands. Use Pmode scratch register.
(*memory_barrier): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand.
* config/sparc/sparc.md (UNSPEC_MEMBAR): Rename from UNSPECV_MEMBAR.
* config/sparc/sync.md (memory_barrier): Expand as unspec instead of
unspec_volatile. Remove mem:BLK from insn operands. Use Pmode
scratch register. Remove operand 1.
(*stbar): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand, remove (const_int 8).
(*membar): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand, remove input operand 2.
* config/xtensa/xtensa.md (UNSPEC_MEMW): Rename from UNSPECV_MEMW.
(memory_barrier): Expand as unspec instead of unspec_volatile.
Remove mem:BLK from insn operands. Use Pmode scratch register.
(*memory_barrier): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand.
* config/ia64/sync.md (memory_barrier): Redefine as expander pattern.
Remove mem:BLK from insn operands. Use Pmode scratch register.
Set volatile flag on operand 0.
(*memory_barrier): New insn pattern.
* config/rs6000/sync.md (memory_barrier): Remove mem:BLK from
insn operands.
(*memory_barrier): Use (match_dup 0) as input operand.
* config/mips/sync.md (memory_barrier): Redefine as expander pattern.
Remove mem:BLK from insn operands. Use Pmode scratch register.
Set volatile flag on operand 0.
(*memory_barrier): New insn pattern.
* config/alpha/sync.md (*memory_barrier): Rename from *mb_internal.
2009-01-04 Steven Bosscher <steven@gcc.gnu.org> 2009-01-04 Steven Bosscher <steven@gcc.gnu.org>
PR middle-end/38586 PR middle-end/38586
......
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
MEM_VOLATILE_P (operands[0]) = 1; MEM_VOLATILE_P (operands[0]) = 1;
}) })
(define_insn "*mb_internal" (define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "") [(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_dup 0)] UNSPEC_MB))] (unspec:BLK [(match_dup 0)] UNSPEC_MB))]
"" ""
......
...@@ -27,9 +27,18 @@ ...@@ -27,9 +27,18 @@
(define_code_attr fetchop_name (define_code_attr fetchop_name
[(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")]) [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
(define_insn "memory_barrier" (define_expand "memory_barrier"
[(set (mem:BLK (match_scratch:DI 0 "X")) [(set (match_dup 0)
(unspec:BLK [(mem:BLK (match_scratch:DI 1 "X"))] UNSPEC_MF))] (unspec:BLK [(match_dup 0)] UNSPEC_MF))]
""
{
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1;
})
(define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_dup 0)] UNSPEC_MF))]
"" ""
"mf" "mf"
[(set_attr "itanium_class" "syst_m")]) [(set_attr "itanium_class" "syst_m")])
......
...@@ -27,9 +27,18 @@ ...@@ -27,9 +27,18 @@
;; Atomic memory operations. ;; Atomic memory operations.
(define_insn "memory_barrier" (define_expand "memory_barrier"
[(set (mem:BLK (scratch)) [(set (match_dup 0)
(unspec:BLK [(const_int 0)] UNSPEC_MEMORY_BARRIER))] (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
"GENERATE_SYNC"
{
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1;
})
(define_insn "*mb_internal"
[(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
"GENERATE_SYNC" "GENERATE_SYNC"
"%|sync%-") "%|sync%-")
......
...@@ -33,8 +33,8 @@ ...@@ -33,8 +33,8 @@
[(plus "rIL") (minus "r") (ior "rKJF") (xor "rKJF") (and "rSTKJ")]) [(plus "rIL") (minus "r") (ior "rKJF") (xor "rKJF") (and "rSTKJ")])
(define_expand "memory_barrier" (define_expand "memory_barrier"
[(set (mem:BLK (match_dup 0)) [(set (match_dup 0)
(unspec:BLK [(mem:BLK (match_dup 0))] UNSPEC_SYNC))] (unspec:BLK [(match_dup 0)] UNSPEC_SYNC))]
"" ""
{ {
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
...@@ -43,7 +43,7 @@ ...@@ -43,7 +43,7 @@
(define_insn "*sync_internal" (define_insn "*sync_internal"
[(set (match_operand:BLK 0 "" "") [(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_operand:BLK 1 "" "")] UNSPEC_SYNC))] (unspec:BLK [(match_dup 0)] UNSPEC_SYNC))]
"" ""
"{dcs|sync}" "{dcs|sync}"
[(set_attr "type" "sync")]) [(set_attr "type" "sync")])
......
...@@ -82,6 +82,9 @@ ...@@ -82,6 +82,9 @@
(UNSPEC_INSN 213) (UNSPEC_INSN 213)
(UNSPEC_EXECUTE 214) (UNSPEC_EXECUTE 214)
; Atomic Support
(UNSPEC_MB 400)
; TLS relocation specifiers ; TLS relocation specifiers
(UNSPEC_TLSGD 500) (UNSPEC_TLSGD 500)
(UNSPEC_TLSLDM 501) (UNSPEC_TLSLDM 501)
...@@ -132,8 +135,7 @@ ...@@ -132,8 +135,7 @@
(UNSPECV_SET_TP 500) (UNSPECV_SET_TP 500)
; Atomic Support ; Atomic Support
(UNSPECV_MB 700) (UNSPECV_CAS 700)
(UNSPECV_CAS 701)
]) ])
;; ;;
...@@ -8183,20 +8185,21 @@ ...@@ -8183,20 +8185,21 @@
; ;
(define_expand "memory_barrier" (define_expand "memory_barrier"
[(set (mem:BLK (match_dup 0)) [(set (match_dup 0)
(unspec_volatile:BLK [(mem:BLK (match_dup 0))] UNSPECV_MB))] (unspec:BLK [(match_dup 0)] UNSPEC_MB))]
"" ""
{ {
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (DImode)); operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1; MEM_VOLATILE_P (operands[0]) = 1;
}) })
(define_insn "*memory_barrier" (define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "") [(set (match_operand:BLK 0 "" "")
(unspec_volatile:BLK [(match_operand:BLK 1 "" "")] UNSPECV_MB))] (unspec:BLK [(match_dup 0)] UNSPEC_MB))]
"" ""
"bcr\t15,0" "bcr\t15,0"
[(set_attr "op_type" "RR")]) [(set_attr "op_type" "RR")])
; Although bcr is superscalar on Z10, this variant will never become part of ; Although bcr is superscalar on Z10, this variant will never become part of
; an execution group. ; an execution group.
......
...@@ -38,6 +38,8 @@ ...@@ -38,6 +38,8 @@
(UNSPEC_EMB_TEXTULO 15) (UNSPEC_EMB_TEXTULO 15)
(UNSPEC_EMB_SETHM 18) (UNSPEC_EMB_SETHM 18)
(UNSPEC_MEMBAR 20)
(UNSPEC_TLSGD 30) (UNSPEC_TLSGD 30)
(UNSPEC_TLSLDM 31) (UNSPEC_TLSLDM 31)
(UNSPEC_TLSLDO 32) (UNSPEC_TLSLDO 32)
...@@ -68,7 +70,6 @@ ...@@ -68,7 +70,6 @@
(UNSPECV_FLUSH 4) (UNSPECV_FLUSH 4)
(UNSPECV_SETJMP 5) (UNSPECV_SETJMP 5)
(UNSPECV_SAVEW 6) (UNSPECV_SAVEW 6)
(UNSPECV_MEMBAR 7)
(UNSPECV_CAS 8) (UNSPECV_CAS 8)
(UNSPECV_SWAP 9) (UNSPECV_SWAP 9)
(UNSPECV_LDSTUB 10) (UNSPECV_LDSTUB 10)
......
...@@ -24,36 +24,28 @@ ...@@ -24,36 +24,28 @@
(define_mode_attr modesuffix [(SI "") (DI "x")]) (define_mode_attr modesuffix [(SI "") (DI "x")])
(define_expand "memory_barrier" (define_expand "memory_barrier"
[(set (mem:BLK (match_dup 0)) [(set (match_dup 0)
(unspec_volatile:BLK [(mem:BLK (match_dup 0)) (match_dup 1)] (unspec:BLK [(match_dup 0)] UNSPEC_MEMBAR))]
UNSPECV_MEMBAR))]
"TARGET_V8 || TARGET_V9" "TARGET_V8 || TARGET_V9"
{ {
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (DImode)); operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1; MEM_VOLATILE_P (operands[0]) = 1;
if (TARGET_V9)
/* member #StoreStore | #LoadStore | #StoreLoad | #LoadLoad */
operands[1] = GEN_INT (15);
else
/* stbar */
operands[1] = GEN_INT (8);
}) })
(define_insn "*stbar" (define_insn "*stbar"
[(set (match_operand:BLK 0 "" "") [(set (match_operand:BLK 0 "" "")
(unspec_volatile:BLK [(match_operand:BLK 1 "" "") (unspec:BLK [(match_dup 0)] UNSPEC_MEMBAR))]
(const_int 8)] UNSPECV_MEMBAR))]
"TARGET_V8" "TARGET_V8"
"stbar" "stbar"
[(set_attr "type" "multi")]) [(set_attr "type" "multi")])
;; membar #StoreStore | #LoadStore | #StoreLoad | #LoadLoad
(define_insn "*membar" (define_insn "*membar"
[(set (match_operand:BLK 0 "" "") [(set (match_operand:BLK 0 "" "")
(unspec_volatile:BLK [(match_operand:BLK 1 "" "") (unspec:BLK [(match_dup 0)] UNSPEC_MEMBAR))]
(match_operand:SI 2 "immediate_operand" "I")]
UNSPECV_MEMBAR))]
"TARGET_V9" "TARGET_V9"
"membar\t%2" "membar\t15"
[(set_attr "type" "multi")]) [(set_attr "type" "multi")])
(define_expand "sync_compare_and_swap<mode>" (define_expand "sync_compare_and_swap<mode>"
......
...@@ -35,10 +35,10 @@ ...@@ -35,10 +35,10 @@
(UNSPEC_TLS_ARG 8) (UNSPEC_TLS_ARG 8)
(UNSPEC_TLS_CALL 9) (UNSPEC_TLS_CALL 9)
(UNSPEC_TP 10) (UNSPEC_TP 10)
(UNSPEC_MEMW 11)
(UNSPECV_SET_FP 1) (UNSPECV_SET_FP 1)
(UNSPECV_ENTRY 2) (UNSPECV_ENTRY 2)
(UNSPECV_MEMW 3)
(UNSPECV_S32RI 4) (UNSPECV_S32RI 4)
(UNSPECV_S32C1I 5) (UNSPECV_S32C1I 5)
(UNSPECV_EH_RETURN 6) (UNSPECV_EH_RETURN 6)
...@@ -1819,17 +1819,17 @@ ...@@ -1819,17 +1819,17 @@
;; Atomic operations ;; Atomic operations
(define_expand "memory_barrier" (define_expand "memory_barrier"
[(set (mem:BLK (match_dup 0)) [(set (match_dup 0)
(unspec_volatile:BLK [(mem:BLK (match_dup 0))] UNSPECV_MEMW))] (unspec:BLK [(match_dup 0)] UNSPEC_MEMW))]
"" ""
{ {
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (SImode)); operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1; MEM_VOLATILE_P (operands[0]) = 1;
}) })
(define_insn "*memory_barrier" (define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "") [(set (match_operand:BLK 0 "" "")
(unspec_volatile:BLK [(match_operand:BLK 1 "" "")] UNSPECV_MEMW))] (unspec:BLK [(match_dup 0)] UNSPEC_MEMW))]
"" ""
"memw" "memw"
[(set_attr "type" "unknown") [(set_attr "type" "unknown")
......
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