s390.md ("*tmqidi_ext"): New insn.

2004-02-04  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/s390/s390.md ("*tmqidi_ext"): New insn.
	("*extendqidi2_short_displ", "*extendsiqi2_short_displ"): Old
	pre-reload splitters are transformed to post-reload
	define_insn_and_split patterns.
	("*tmqisi_ext"): Renamed old "*tmqi_ext".

From-SVN: r77346

gcc/ChangeLog

+2004-02-05  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* config/s390/s390.md ("*tmqidi_ext"): New insn.
+	("*extendqidi2_short_displ", "*extendsiqi2_short_displ"): Old
+	pre-reload splitters are transformed to post-reload
+	define_insn_and_split patterns.
+	("*tmqisi_ext"): Renamed old "*tmqi_ext".
+
 2004-02-05  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* config/cris/cris.h: Replace PROMOTE_PROTOTYPES with

gcc/config/s390/s390.md

@@ -433,13 +433,13 @@
 }
   [(set_attr "op_type" "RI")])
 
-(define_insn "*tmqi_ext"
+(define_insn "*tmqisi_ext"
   [(set (reg 33)
         (compare (zero_extract:SI (match_operand:QI 0 "memory_operand" "Q,S")
 	                          (match_operand:SI 1 "const_int_operand" "n,n")
                                   (match_operand:SI 2 "const_int_operand" "n,n"))
                  (const_int 0)))]
-  "s390_match_ccmode(insn, CCTmode)
+  "!TARGET_64BIT && s390_match_ccmode(insn, CCTmode)
    && INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0
    && INTVAL (operands[1]) + INTVAL (operands[2]) <= 8"
 {
@@ -451,6 +451,25 @@
 }
   [(set_attr "op_type" "SI,SIY")])
 
+(define_insn "*tmqidi_ext"
+  [(set (reg 33)
+        (compare (zero_extract:DI (match_operand:QI 0 "memory_operand" "Q,S")
+	                          (match_operand:SI 1 "const_int_operand" "n,n")
+                                  (match_operand:SI 2 "const_int_operand" "n,n"))
+                 (const_int 0)))]
+  "TARGET_64BIT && s390_match_ccmode(insn, CCTmode)
+   && INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0
+   && INTVAL (operands[1]) + INTVAL (operands[2]) <= 8"
+{
+  int block = (1 << INTVAL (operands[1])) - 1;
+  int shift = 8 - INTVAL (operands[1]) - INTVAL (operands[2]);
+
+  operands[2] = GEN_INT (block << shift);
+  return which_alternative == 0 ? "tm\t%0,%b2" : "tmy\t%0,%b2";
+}
+  [(set_attr "op_type" "SI,SIY")])
+
+
 ; Test-under-Mask instructions
 
 (define_insn "*tmdi_mem"
@@ -2520,10 +2539,12 @@
   "lgb\t%0,%1"
   [(set_attr "op_type" "RXY")])
 
-(define_split
-  [(set (match_operand:DI 0 "register_operand" "")
-        (sign_extend:DI (match_operand:QI 1 "s_operand" "")))]
-  "TARGET_64BIT && !TARGET_LONG_DISPLACEMENT && !reload_completed"
+(define_insn_and_split "*extendqidi2_short_displ"
+  [(set (match_operand:DI 0 "register_operand" "=d")
+        (sign_extend:DI (match_operand:QI 1 "s_operand" "Q")))]
+  "TARGET_64BIT && !TARGET_LONG_DISPLACEMENT"
+  "#"
+  "&& reload_completed"
   [(parallel
     [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_SETHIGH))
      (clobber (reg:CC 33))])
@@ -2582,10 +2603,12 @@
   "lb\t%0,%1"
   [(set_attr "op_type" "RXY")])
 
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-        (sign_extend:SI (match_operand:QI 1 "s_operand" "")))]
-  "!TARGET_LONG_DISPLACEMENT && !reload_completed"
+(define_insn_and_split "*extendsiqi2_short_displ"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+        (sign_extend:SI (match_operand:QI 1 "s_operand" "Q")))]
+  "!TARGET_LONG_DISPLACEMENT"
+  "#"
+  "&& reload_completed"
   [(parallel
     [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
      (clobber (reg:CC 33))])