Commit 195610aa by Eric Botcazou Committed by Eric Botcazou

visium.md (type): Add trap.

	* config/visium/visium.md (type): Add trap.
	(b): New mode attribute.
	(*btst): Rename into...
	(*btst<mode>): ...this and adjust.
	(*cbranchsi4_btst_insn): Rename into...
	(*cbranch<mode>4_btst_insn): ...this and adjust.
	(trap): New define_insn.

From-SVN: r245691
parent ada61c3d
2017-02-23 Eric Botcazou <ebotcazou@adacore.com>
* config/visium/visium.md (type): Add trap.
(b): New mode attribute.
(*btst): Rename into...
(*btst<mode>): ...this and adjust.
(*cbranchsi4_btst_insn): Rename into...
(*cbranch<mode>4_btst_insn): ...this and adjust.
(trap): New define_insn.
2017-02-23 Jakub Jelinek <jakub@redhat.com> 2017-02-23 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/79389 PR tree-optimization/79389
......
...@@ -137,9 +137,10 @@ ...@@ -137,9 +137,10 @@
;nop No operation. ;nop No operation.
;multi Multiple instructions which split. ;multi Multiple instructions which split.
;asm User asm instructions. ;asm User asm instructions.
;trap Trap instructions.
(define_attr "type" (define_attr "type"
"imm_reg,mem_reg,eam_reg,fp_reg,reg_mem,reg_eam,reg_fp,arith,arith2,logic,abs_branch,branch,bmi,call,ret,rfi,dsi,cmp,div,divd,mul,shiftdi,fdiv,fsqrt,ftoi,itof,fmove,fcmp,fp,nop,multi,asm" (const_string "logic")) "imm_reg,mem_reg,eam_reg,fp_reg,reg_mem,reg_eam,reg_fp,arith,arith2,logic,abs_branch,branch,bmi,call,ret,rfi,dsi,cmp,div,divd,mul,shiftdi,fdiv,fsqrt,ftoi,itof,fmove,fcmp,fp,nop,multi,asm,trap" (const_string "logic"))
; Those insns that occupy 4 bytes. ; Those insns that occupy 4 bytes.
(define_attr "single_insn" "no,yes" (define_attr "single_insn" "no,yes"
...@@ -205,6 +206,7 @@ ...@@ -205,6 +206,7 @@
(define_mode_iterator QHI [QI HI]) (define_mode_iterator QHI [QI HI])
(define_mode_iterator I [QI HI SI]) (define_mode_iterator I [QI HI SI])
(define_mode_attr b [(QI "8") (HI "16") (SI "32")])
(define_mode_attr s [(QI ".b") (HI ".w") (SI ".l")]) (define_mode_attr s [(QI ".b") (HI ".w") (SI ".l")])
; This code iterator allows signed and unsigned widening multiplications ; This code iterator allows signed and unsigned widening multiplications
...@@ -1986,15 +1988,15 @@ ...@@ -1986,15 +1988,15 @@
; BITS_BIG_ENDIAN is defined to 1 so operand #1 counts from the MSB. ; BITS_BIG_ENDIAN is defined to 1 so operand #1 counts from the MSB.
(define_insn "*btst" (define_insn "*btst<mode>"
[(set (reg:CCC R_FLAGS) [(set (reg:CCC R_FLAGS)
(compare:CCC (zero_extract:SI (compare:CCC (zero_extract:I
(match_operand:SI 0 "register_operand" "r") (match_operand:I 0 "register_operand" "r")
(const_int 1) (const_int 1)
(match_operand:QI 1 "const_shift_operand" "K")) (match_operand:QI 1 "const_shift_operand" "K"))
(const_int 0)))] (const_int 0)))]
"reload_completed" "reload_completed"
"lsr.l r0,%0,32-%1" "lsr<s> r0,%0,<b>-%1"
[(set_attr "type" "logic")]) [(set_attr "type" "logic")])
;; ;;
...@@ -2373,11 +2375,11 @@ ...@@ -2373,11 +2375,11 @@
} }
[(set_attr "type" "cmp")]) [(set_attr "type" "cmp")])
(define_insn_and_split "*cbranchsi4_btst_insn" (define_insn_and_split "*cbranch<mode>4_btst_insn"
[(set (pc) [(set (pc)
(if_then_else (match_operator 0 "visium_equality_comparison_operator" (if_then_else (match_operator 0 "visium_equality_comparison_operator"
[(zero_extract:SI [(zero_extract:I
(match_operand:SI 1 "register_operand" "r") (match_operand:I 1 "register_operand" "r")
(const_int 1) (const_int 1)
(match_operand:QI 2 "const_shift_operand" "K")) (match_operand:QI 2 "const_shift_operand" "K"))
(const_int 0)]) (const_int 0)])
...@@ -2513,6 +2515,20 @@ ...@@ -2513,6 +2515,20 @@
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; trap instructions
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
(define_insn "trap"
[(trap_if (const_int 1) (const_int 0))]
""
"stop 0,r0"
[(set_attr "type" "trap")])
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Subprogram call instructions ;; Subprogram call instructions
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
......
2017-02-23 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/visium/bit_test.c: Accept any lsr form.
* gcc.target/visium/block_move.c: Tweak.
2017-02-23 Dominik Vogt <vogt@linux.vnet.ibm.com> 2017-02-23 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR 68749 PR 68749
......
...@@ -27,5 +27,5 @@ void foo4 (unsigned char c) ...@@ -27,5 +27,5 @@ void foo4 (unsigned char c)
bar (); bar ();
} }
/* { dg-final { scan-assembler-times "lsr.l" 2 } } */ /* { dg-final { scan-assembler-times "lsr" 2 } } */
/* { dg-final { scan-assembler-times "cmp" 2 } } */ /* { dg-final { scan-assembler-times "cmp" 2 } } */
...@@ -11,7 +11,7 @@ void foo (void) ...@@ -11,7 +11,7 @@ void foo (void)
int dst[LEN], src[LEN]; int dst[LEN], src[LEN];
unsigned int i; unsigned int i;
__builtin_memset (src, 0, LEN * sizeof (int)); __builtin_memset (src, 1, LEN * sizeof (int));
__builtin_memcpy (dst, src, LEN * sizeof (int)); __builtin_memcpy (dst, src, LEN * sizeof (int));
if (__builtin_memcmp (dst, src, LEN * sizeof (int)) != 0) if (__builtin_memcmp (dst, src, LEN * sizeof (int)) != 0)
abort (); abort ();
......
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