m32r.md, [...]: Fix comment typos.

	* config/m32r/m32r.md, config/m68k/m68kelf.h,
	config/mcore/mcore.md, config/rs6000/linux64.h,
	config/rs6000/rs6000.c, config/sparc/sparc.c: Fix comment
	typos.

From-SVN: r87481

gcc/ChangeLog

+2004-09-14  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/m32r/m32r.md, config/m68k/m68kelf.h,
+	config/mcore/mcore.md, config/rs6000/linux64.h,
+	config/rs6000/rs6000.c, config/sparc/sparc.c: Fix comment
+	typos.
+
 2004-09-13  James E Wilson  <wilson@specifixinc.com>
 
 	* Makefile.in (GEN_PROTOS_OBJS): Add $(BUILD_ERRORS).

gcc/config/m32r/m32r.md

@@ -169,7 +169,7 @@
 
 ;; Load/store instructions do 6 stages: IF D E MEM1 MEM2 WB.
 ;; MEM1 may require more than one cycle depending on locality.  We
-;; optimistically assume all memory is nearby, ie. MEM1 takes only
+;; optimistically assume all memory is nearby, i.e. MEM1 takes only
 ;; one cycle.  Hence, ready latency is 3.
 
 ;; The M32Rx can do short load/store only on the left pipe.

gcc/config/m68k/m68kelf.h

@@ -159,7 +159,7 @@ do {								\
 #endif
 
 /* The `string' directive on m68k svr4 does not handle string with
-   escape char (ie., `\') right. Use normal way to output ASCII bytes
+   escape char (i.e., `\') right. Use normal way to output ASCII bytes
    seems to be safer.  */
 #undef ASM_OUTPUT_ASCII
 #define ASM_OUTPUT_ASCII(FILE,PTR,LEN)				\

gcc/config/mcore/mcore.md

@@ -3157,7 +3157,7 @@
 }")
 
 ; experimental - do the constant folding ourselves.  note that this isn't
-;   re-applied like we'd really want.  ie., four ands collapse into two
+;   re-applied like we'd really want.  i.e., four ands collapse into two
 ;   instead of one.  this is because peepholes are applied as a sliding
 ;   window.  the peephole does not generate new rtl's, but instead slides
 ;   across the rtl's generating machine instructions.  it would be nice

gcc/config/rs6000/linux64.h

@@ -258,7 +258,7 @@ extern int dot_symbols;
    than a doubleword should be padded upward or downward.  You could
    reasonably assume that they follow the normal rules for structure
    layout treating the parameter area as any other block of memory,
-   then map the reg param area to registers.  ie. pad updard.
+   then map the reg param area to registers.  i.e. pad upward.
    Setting both of the following defines results in this behavior.
    Setting just the first one will result in aggregates that fit in a
    doubleword being padded downward, and others being padded upward.

gcc/config/rs6000/rs6000.c

@@ -4619,7 +4619,7 @@ function_arg_padding (enum machine_mode mode, tree type)
     {
       /* GCC used to pass structures of the same size as integer types as
 	 if they were in fact integers, ignoring FUNCTION_ARG_PADDING.
-	 ie. Structures of size 1 or 2 (or 4 when TARGET_64BIT) were
+	 i.e. Structures of size 1 or 2 (or 4 when TARGET_64BIT) were
 	 passed padded downward, except that -mstrict-align further
 	 muddied the water in that multi-component structures of 2 and 4
 	 bytes in size were passed padded upward.

gcc/config/sparc/sparc.c

@@ -4609,7 +4609,7 @@ sparc_asm_function_epilogue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
   /* If code does not drop into the epilogue, we have to still output
      a dummy nop for the sake of sane backtraces.  Otherwise, if the
      last two instructions of a function were "call foo; dslot;" this
-     can make the return PC of foo (ie. address of call instruction
+     can make the return PC of foo (i.e. address of call instruction
      plus 8) point to the first instruction in the next function.  */
 
   rtx insn, last_real_insn;