arm: Convert to atomic optabs.

	* config/arm/arm.c (arm_gen_compare_reg): Add scratch argument;
	use it if reload_completed.
	(arm_legitimize_sync_memory, arm_emit, arm_insn_count, arm_count,
	arm_output_asm_insn, arm_process_output_memory_barrier,
	arm_output_memory_barrier, arm_ldrex_suffix, arm_output_ldrex,
	arm_output_strex, arm_output_it, arm_output_op2, arm_output_op3,
	arm_output_sync_loop, arm_get_sync_operand, FETCH_SYNC_OPERAND,
	arm_process_output_sync_insn, arm_output_sync_insn,
	arm_sync_loop_insns, arm_call_generator, arm_expand_sync): Remove.
	(arm_pre_atomic_barrier, arm_post_atomic_barrier): New.
	(arm_emit_load_exclusive, arm_emit_store_exclusive): New.
	(emit_unlikely_jump): New.
	(arm_expand_compare_and_swap, arm_split_compare_and_swap): New.
	(arm_split_atomic_op): New.
	* config/arm/arm-protos.h: Update.
	* config/arm/arm.h (enum arm_sync_generator_tag): Remove.
	(struct arm_sync_generator): Remove.
	* config/arm/arm.md (VUNSPEC_SYNC_COMPARE_AND_SWAP, VUNSPEC_SYNC_LOCK,
	VUNSPEC_SYNC_OP, VUNSPEC_SYNC_NEW_OP, VUNSPEC_SYNC_OLD_OP): Remove.
	(VUNSPEC_ATOMIC_CAS, VUNSPEC_ATOMIC_XCHG, VUNSPEC_ATOMIC_OP): New.
	(VUNSPEC_LL, VUNSPEC_SC): New.
	(sync_result, sync_memory, sync_required_value, sync_new_value,
	sync_t1, sync_t2, sync_release_barrier, sync_op): Remove.
	(attr length): Don't use arm_sync_loop_insns.
	(cbranch_cc, cstore_cc): Update call to arm_gen_compare_reg.
	(movsfcc, movdfcc): Likewise.
	* config/arm/constraints.md (Ua): New.
	* config/arm/prediates.md (mem_noofs_operand): New.
	(sync_compare_and_swap<QHSD>, sync_lock_test_and_set<QHSD>): Remove.
	(sync_clobber, sync_t2_reqd): Remove.
	(sync_<syncop><QHSD>, sync_nand<QHSD>): Remove.
	(sync_new_<syncop><QHSD>, sync_new_nand<QHSD>): Remove.
	(sync_old_<syncop><QHSD>, sync_old_nand<QHSD>): Remove.
	(arm_sync_compare_and_swap<SIDI>): Remove.
	(arm_sync_compare_and_swap<NARROW>): Remove.
	(arm_sync_lock_test_and_set<SIDI>): Remove.
	(arm_sync_lock_test_and_set<NARROW>): Remove.
	(arm_sync_new_<syncop><SIDI>): Remove.
	(arm_sync_new_<syncop><NARROW>): Remove.
	(arm_sync_new_nand<SIDI>): Remove.
	(arm_sync_new_nand<NARROW>): Remove.
	(arm_sync_old_<syncop><SIDI>): Remove.
	(arm_sync_old_<syncop><NARROW>): Remove.
	(arm_sync_old_nand<SIDI>): Remove.
	(arm_sync_old_nand<NARROW>): Remove.
	(*memory_barrier): Merge arm_output_memory_barrier.
	(atomic_compare_and_swap<QHSD>): New.
	(atomic_compare_and_swap<NARROW>_1): New.
	(atomic_compare_and_swap<SIDI>_1): New.
	(atomic_exchange<QHSD>): New.
	(cas_cmp_operand, cas_cmp_str): New.
	(atomic_op_operand, atomic_op_str): New.
	(atomic_<syncop><QHSD>, atomic_nand<QHSD>): New.
	(atomic_fetch_<syncop><QHSD>, atomic_fetch_nand<QHSD>): New.
	(atomic_<syncop>_fetch<QHSD>, atomic_nand_fetch<QHSD>): New.
	(arm_load_exclusive<NARROW>): New.
	(arm_load_exclusivesi, arm_load_exclusivedi): New.
	(arm_store_exclusive<QHSD>): New.

From-SVN: r183050

gcc/ChangeLog

+2012-01-10  Richard Henderson  <rth@redhat.com>
+
+	* config/arm/arm.c (arm_gen_compare_reg): Add scratch argument;
+	use it if reload_completed.
+	(arm_legitimize_sync_memory, arm_emit, arm_insn_count, arm_count,
+	arm_output_asm_insn, arm_process_output_memory_barrier,
+	arm_output_memory_barrier, arm_ldrex_suffix, arm_output_ldrex,
+	arm_output_strex, arm_output_it, arm_output_op2, arm_output_op3,
+	arm_output_sync_loop, arm_get_sync_operand, FETCH_SYNC_OPERAND,
+	arm_process_output_sync_insn, arm_output_sync_insn,
+	arm_sync_loop_insns, arm_call_generator, arm_expand_sync): Remove.
+	(arm_pre_atomic_barrier, arm_post_atomic_barrier): New.
+	(arm_emit_load_exclusive, arm_emit_store_exclusive): New.
+	(emit_unlikely_jump): New.
+	(arm_expand_compare_and_swap, arm_split_compare_and_swap): New.
+	(arm_split_atomic_op): New.
+	* config/arm/arm-protos.h: Update.
+	* config/arm/arm.h (enum arm_sync_generator_tag): Remove.
+	(struct arm_sync_generator): Remove.
+	* config/arm/arm.md (VUNSPEC_SYNC_COMPARE_AND_SWAP, VUNSPEC_SYNC_LOCK,
+	VUNSPEC_SYNC_OP, VUNSPEC_SYNC_NEW_OP, VUNSPEC_SYNC_OLD_OP): Remove.
+	(VUNSPEC_ATOMIC_CAS, VUNSPEC_ATOMIC_XCHG, VUNSPEC_ATOMIC_OP): New.
+	(VUNSPEC_LL, VUNSPEC_SC): New.
+	(sync_result, sync_memory, sync_required_value, sync_new_value,
+	sync_t1, sync_t2, sync_release_barrier, sync_op): Remove.
+	(attr length): Don't use arm_sync_loop_insns.
+	(cbranch_cc, cstore_cc): Update call to arm_gen_compare_reg.
+	(movsfcc, movdfcc): Likewise.
+	* config/arm/constraints.md (Ua): New.
+	* config/arm/prediates.md (mem_noofs_operand): New.
+	(sync_compare_and_swap<QHSD>, sync_lock_test_and_set<QHSD>): Remove.
+	(sync_clobber, sync_t2_reqd): Remove.
+	(sync_<syncop><QHSD>, sync_nand<QHSD>): Remove.
+	(sync_new_<syncop><QHSD>, sync_new_nand<QHSD>): Remove.
+	(sync_old_<syncop><QHSD>, sync_old_nand<QHSD>): Remove.
+	(arm_sync_compare_and_swap<SIDI>): Remove.
+	(arm_sync_compare_and_swap<NARROW>): Remove.
+	(arm_sync_lock_test_and_set<SIDI>): Remove.
+	(arm_sync_lock_test_and_set<NARROW>): Remove.
+	(arm_sync_new_<syncop><SIDI>): Remove.
+	(arm_sync_new_<syncop><NARROW>): Remove.
+	(arm_sync_new_nand<SIDI>): Remove.
+	(arm_sync_new_nand<NARROW>): Remove.
+	(arm_sync_old_<syncop><SIDI>): Remove.
+	(arm_sync_old_<syncop><NARROW>): Remove.
+	(arm_sync_old_nand<SIDI>): Remove.
+	(arm_sync_old_nand<NARROW>): Remove.
+	(*memory_barrier): Merge arm_output_memory_barrier.
+	(atomic_compare_and_swap<QHSD>): New.
+	(atomic_compare_and_swap<NARROW>_1): New.
+	(atomic_compare_and_swap<SIDI>_1): New.
+	(atomic_exchange<QHSD>): New.
+	(cas_cmp_operand, cas_cmp_str): New.
+	(atomic_op_operand, atomic_op_str): New.
+	(atomic_<syncop><QHSD>, atomic_nand<QHSD>): New.
+	(atomic_fetch_<syncop><QHSD>, atomic_fetch_nand<QHSD>): New.
+	(atomic_<syncop>_fetch<QHSD>, atomic_nand_fetch<QHSD>): New.
+	(arm_load_exclusive<NARROW>): New.
+	(arm_load_exclusivesi, arm_load_exclusivedi): New.
+	(arm_store_exclusive<QHSD>): New.
+
+2012-01-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add DF
 	reload patterns if -mvsx-scalar-memory.

gcc/config/arm/arm-protos.h

 /* Prototypes for exported functions defined in arm.c and pe.c
    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
-   2009, 2010 Free Software Foundation, Inc.
+   2009, 2010, 2012  Free Software Foundation, Inc.
    Contributed by Richard Earnshaw (rearnsha@arm.com)
    Minor hacks by Nick Clifton (nickc@cygnus.com)
 
@@ -116,7 +116,7 @@ extern int arm_gen_movmemqi (rtx *);
 extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
 extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
 						       HOST_WIDE_INT);
-extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx);
+extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
 extern rtx arm_gen_return_addr_mask (void);
 extern void arm_reload_in_hi (rtx *);
 extern void arm_reload_out_hi (rtx *);
@@ -155,12 +155,11 @@ extern const char *vfp_output_fstmd (rtx *);
 extern void arm_set_return_address (rtx, rtx);
 extern int arm_eliminable_register (rtx);
 extern const char *arm_output_shift(rtx *, int);
-extern void arm_expand_sync (enum machine_mode, struct arm_sync_generator *,
- 			     rtx, rtx, rtx, rtx);
-extern const char *arm_output_memory_barrier (rtx *);
-extern const char *arm_output_sync_insn (rtx, rtx *);
 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
 extern int arm_attr_length_push_multi(rtx, rtx);
+extern void arm_expand_compare_and_swap (rtx op[]);
+extern void arm_split_compare_and_swap (rtx op[]);
+extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
 
 #if defined TREE_CODE
 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);

gcc/config/arm/arm.h

 /* Definitions of target machine for GNU compiler, for ARM.
    Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
-   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
    Free Software Foundation, Inc.
    Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
    and Martin Simmons (@harleqn.co.uk).
@@ -123,24 +123,6 @@ enum target_cpus
 /* The processor for which instructions should be scheduled.  */
 extern enum processor_type arm_tune;
 
-enum arm_sync_generator_tag
-  {
-    arm_sync_generator_omn,
-    arm_sync_generator_omrn
-  };
-
-/* Wrapper to pass around a polymorphic pointer to a sync instruction
-   generator and.  */
-struct arm_sync_generator
-{
-  enum arm_sync_generator_tag op;
-  union
-  {
-    rtx (* omn) (rtx, rtx, rtx);
-    rtx (* omrn) (rtx, rtx, rtx, rtx);
-  } u;
-};
-
 typedef enum arm_cond_code
 {
   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC, ARM_MI, ARM_PL, ARM_VS, ARM_VC,

gcc/config/arm/arm.md

@@ -151,11 +151,11 @@
   VUNSPEC_WCMP_GT       ; Used by the iwMMXT WCMPGT instructions
   VUNSPEC_EH_RETURN     ; Use to override the return address for exception
                         ; handling.
-  VUNSPEC_SYNC_COMPARE_AND_SWAP    ; Represent an atomic compare swap.
-  VUNSPEC_SYNC_LOCK                ; Represent a sync_lock_test_and_set.
-  VUNSPEC_SYNC_OP                  ; Represent a sync_<op>
-  VUNSPEC_SYNC_NEW_OP              ; Represent a sync_new_<op>
-  VUNSPEC_SYNC_OLD_OP              ; Represent a sync_old_<op>
+  VUNSPEC_ATOMIC_CAS	; Represent an atomic compare swap.
+  VUNSPEC_ATOMIC_XCHG	; Represent an atomic exchange.
+  VUNSPEC_ATOMIC_OP	; Represent an atomic operation.
+  VUNSPEC_LL		; Represent a load-register-exclusive.
+  VUNSPEC_SC		; Represent a store-register-exclusive.
 ])
 
 ;;---------------------------------------------------------------------------
@@ -185,21 +185,9 @@
 (define_attr "fpu" "none,fpa,fpe2,fpe3,maverick,vfp"
   (const (symbol_ref "arm_fpu_attr")))
 
-(define_attr "sync_result"          "none,0,1,2,3,4,5" (const_string "none"))
-(define_attr "sync_memory"          "none,0,1,2,3,4,5" (const_string "none"))
-(define_attr "sync_required_value"  "none,0,1,2,3,4,5" (const_string "none"))
-(define_attr "sync_new_value"       "none,0,1,2,3,4,5" (const_string "none"))
-(define_attr "sync_t1"              "none,0,1,2,3,4,5" (const_string "none"))
-(define_attr "sync_t2"              "none,0,1,2,3,4,5" (const_string "none"))
-(define_attr "sync_release_barrier" "yes,no"           (const_string "yes"))
-(define_attr "sync_op"              "none,add,sub,ior,xor,and,nand"
-                                    (const_string "none"))
-
 ; LENGTH of an instruction (in bytes)
 (define_attr "length" ""
-  (cond [(not (eq_attr "sync_memory" "none"))
- 	   (symbol_ref "arm_sync_loop_insns (insn, operands) * 4")
-	] (const_int 4)))
+  (const_int 4))
 
 ; The architecture which supports the instruction (or alternative).
 ; This can be "a" for ARM, "t" for either of the Thumbs, "32" for
@@ -7637,7 +7625,7 @@
 		      (pc)))]
   "TARGET_32BIT"
   "operands[1] = arm_gen_compare_reg (GET_CODE (operands[0]),
-				      operands[1], operands[2]);
+				      operands[1], operands[2], NULL_RTX);
    operands[2] = const0_rtx;"
 )
 
@@ -7707,7 +7695,7 @@
 				 (match_operand 3 "" "")]))]
   "TARGET_32BIT"
   "operands[2] = arm_gen_compare_reg (GET_CODE (operands[1]),
-				      operands[2], operands[3]);
+				      operands[2], operands[3], NULL_RTX);
    operands[3] = const0_rtx;"
 )
 
@@ -8035,7 +8023,7 @@
       FAIL;
 
     ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
-				 XEXP (operands[1], 1));
+				 XEXP (operands[1], 1), NULL_RTX);
     operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
   }"
 )
@@ -8061,7 +8049,7 @@
       operands[3] = force_reg (SFmode, operands[3]);
 
     ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
-				 XEXP (operands[1], 1));
+				 XEXP (operands[1], 1), NULL_RTX);
     operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
   }"
 )
@@ -8081,7 +8069,7 @@
       FAIL;
 
     ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
-				 XEXP (operands[1], 1));
+				 XEXP (operands[1], 1), NULL_RTX);
     operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
   }"
 )

gcc/config/arm/constraints.md

@@ -297,6 +297,11 @@
   (and (match_code "const_double")
        (match_test "TARGET_32BIT && TARGET_VFP && vfp3_const_double_for_fract_bits (op)")))
 
+(define_memory_constraint "Ua"
+ "@internal
+  An address valid for loading/storing register exclusive"
+ (match_operand 0 "mem_noofs_operand"))
+
 (define_memory_constraint "Ut"
  "@internal
   In ARM/Thumb-2 state an address valid for loading/storing opaque structure

gcc/config/arm/predicates.md

@@ -769,3 +769,7 @@
 
 (define_special_predicate "add_operator"
   (match_code "plus"))
+
+(define_predicate "mem_noofs_operand"
+  (and (match_code "mem")
+       (match_code "reg" "0")))