Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
17c672d7
Commit
17c672d7
authored
Apr 21, 1992
by
Tom Wood
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
*** empty log message ***
From-SVN: r810
parent
d7ea4cf6
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
108 additions
and
7 deletions
+108
-7
gcc/config/m88k/m88k.c
+92
-2
gcc/config/m88k/m88k.h
+8
-3
gcc/config/m88k/m88k.md
+8
-2
No files found.
gcc/config/m88k/m88k.c
View file @
17c672d7
...
...
@@ -46,7 +46,7 @@ extern char *ctime ();
extern
int
flag_traditional
;
extern
FILE
*
asm_out_file
;
static
char
out_sccs_id
[]
=
"@(#)m88k.c 2.1.
3.1 07 Apr 1992 17:23:59
"
;
static
char
out_sccs_id
[]
=
"@(#)m88k.c 2.1.
4.6 20 Apr 1992 14:30:40
"
;
static
char
tm_sccs_id
[]
=
TM_SCCS_ID
;
char
*
m88k_pound_sign
=
""
;
/* Either # for SVR4 or empty for SVR3 */
...
...
@@ -718,11 +718,14 @@ output_call (operands, addr)
if
(
final_sequence
)
{
rtx
jump
;
rtx
seq_insn
;
/* This can be generalized, but there is currently no need. */
if
(
XVECLEN
(
final_sequence
,
0
)
!=
2
)
abort
();
/* The address of interior insns is not computed, so use the sequence. */
seq_insn
=
NEXT_INSN
(
PREV_INSN
(
XVECEXP
(
final_sequence
,
0
,
0
)));
jump
=
XVECEXP
(
final_sequence
,
0
,
1
);
if
(
GET_CODE
(
jump
)
==
JUMP_INSN
)
{
...
...
@@ -730,7 +733,8 @@ output_call (operands, addr)
char
*
last
;
rtx
dest
=
XEXP
(
SET_SRC
(
PATTERN
(
jump
)),
0
);
int
delta
=
4
*
(
insn_addresses
[
INSN_UID
(
dest
)]
-
insn_addresses
[
INSN_UID
(
jump
)]);
-
insn_addresses
[
INSN_UID
(
seq_insn
)]
-
2
);
#if (MONITOR_GCC & 0x2)
/* How often do long branches happen? */
if
((
unsigned
)
(
delta
+
0x8000
)
>=
0x10000
)
warning
(
"Internal gcc monitor: short-branch(%x)"
,
delta
);
...
...
@@ -818,6 +822,92 @@ output_short_branch_defs (stream)
abort
();
}
/* Return truth value of the statement that this conditional branch is likely
to fall through. CONDITION, is the condition that JUMP_INSN is testing. */
int
mostly_false_jump
(
jump_insn
,
condition
)
rtx
jump_insn
,
condition
;
{
rtx
target_label
=
JUMP_LABEL
(
jump_insn
);
rtx
insnt
,
insnj
;
/* Much of this isn't computed unless we're optimizing. */
if
(
optimize
==
0
)
return
0
;
/* Determine if one path or the other leads to a return. */
for
(
insnt
=
NEXT_INSN
(
target_label
);
insnt
;
insnt
=
NEXT_INSN
(
insnt
))
if
(
GET_CODE
(
insnt
)
==
JUMP_INSN
||
(
GET_CODE
(
insnt
)
==
SEQUENCE
&&
GET_CODE
(
XVECEXP
(
insnt
,
0
,
0
))
==
JUMP_INSN
))
break
;
if
(
insnt
&&
GET_CODE
(
PATTERN
(
insnt
))
==
RETURN
)
insnt
=
0
;
for
(
insnj
=
NEXT_INSN
(
jump_insn
);
insnj
;
insnj
=
NEXT_INSN
(
insnj
))
if
(
GET_CODE
(
insnj
)
==
JUMP_INSN
||
(
GET_CODE
(
insnj
)
==
SEQUENCE
&&
GET_CODE
(
XVECEXP
(
insnj
,
0
,
0
))
==
JUMP_INSN
))
break
;
if
(
insnj
&&
GET_CODE
(
PATTERN
(
insnj
))
==
RETURN
)
insnj
=
0
;
/* Predict to not return. */
if
(
insnt
!=
insnj
)
return
(
insnt
==
0
);
/* Predict loops to loop. */
for
(
insnt
=
PREV_INSN
(
target_label
);
insnt
&&
GET_CODE
(
insnt
)
==
NOTE
;
insnt
=
PREV_INSN
(
insnt
))
if
(
NOTE_LINE_NUMBER
(
insnt
)
==
NOTE_INSN_LOOP_END
)
return
1
;
else
if
(
NOTE_LINE_NUMBER
(
insnt
)
==
NOTE_INSN_LOOP_BEG
)
return
0
;
else
if
(
NOTE_LINE_NUMBER
(
insnt
)
==
NOTE_INSN_LOOP_CONT
)
return
0
;
/* Predict backward branches usually take. */
if
(
final_sequence
)
insnj
=
NEXT_INSN
(
PREV_INSN
(
XVECEXP
(
final_sequence
,
0
,
0
)));
else
insnj
=
jump_insn
;
if
(
insn_addresses
[
INSN_UID
(
insnj
)]
>
insn_addresses
[
INSN_UID
(
target_label
)])
return
0
;
/* EQ tests are usually false and NE tests are usually true. Also,
most quantities are positive, so we can make the appropriate guesses
about signed comparisons against zero. */
switch
(
GET_CODE
(
condition
))
{
case
CONST_INT
:
/* Unconditional branch. */
return
0
;
case
EQ
:
return
1
;
case
NE
:
return
0
;
case
LE
:
case
LT
:
if
(
XEXP
(
condition
,
1
)
==
const0_rtx
)
return
1
;
break
;
case
GE
:
case
GT
:
if
(
XEXP
(
condition
,
1
)
==
const0_rtx
)
return
0
;
break
;
}
return
0
;
}
/* Report errors on floating point, if we are given NaN's, or such. Leave
the number as is, though, since we output the number in hex, and the
assembler won't choke on it. */
...
...
gcc/config/m88k/m88k.h
View file @
17c672d7
...
...
@@ -204,9 +204,9 @@ extern char * reg_names[];
/* Print subsidiary information on the compiler version in use.
Redefined in m88kv4.h, and m88kluna.h. */
#define VERSION_INFO1 "88open OCS/BCS, "
#define VERSION_INFO2 "
07
Apr 1992"
#define VERSION_INFO2 "
21
Apr 1992"
#define VERSION_STRING version_string
#define TM_SCCS_ID "@(#)m88k.h 2.1.
3.1 07 Apr 1992 17:24:45
"
#define TM_SCCS_ID "@(#)m88k.h 2.1.
4.5 21 Apr 1992 08:02:51
"
/* Run-time compilation parameters selecting different hardware subsets. */
...
...
@@ -1469,6 +1469,11 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
so give the MEM rtx word mode. */
#define FUNCTION_MODE SImode
/* A barrier will be aligned so account for the possible expansion. */
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
if (GET_CODE (INSN) == BARRIER) \
LENGTH += 1;
/* Compute the cost of computing a constant rtl expression RTX
whose rtx-code is CODE. The body of this macro is a portion
of a switch statement. If the code is computed here,
...
...
@@ -1551,7 +1556,6 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
/* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
#undef INT_ASM_OP
#undef ASCII_DATA_ASM_OP
#undef INIT_SECTION_ASM_OP
#undef CONST_SECTION_ASM_OP
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
...
...
@@ -2261,6 +2265,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
#else
/* m88kluna or other not based on svr[34].h. */
#undef INIT_SECTION_ASM_OP
#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
#define CONST_SECTION_FUNCTION \
void \
...
...
gcc/config/m88k/m88k.md
View file @
17c672d7
...
...
@@ -28,7 +28,7 @@
(define_expand "m88k_sccs_id"
[
(match_operand:SI 0 "" "")
]
""
"{ static char sccs_id
[
] =
\"
@(#)m88k.md 2.1.4.
2 15 Apr 1992 15:39:48
\"
;
"{ static char sccs_id
[
] =
\"
@(#)m88k.md 2.1.4.
3 20 Apr 1992 10:42:47
\"
;
FAIL; }")
;; Attribute specifications
...
...
@@ -995,7 +995,13 @@
(match_operand 2 "pc_or_label_ref" "")
(match_operand 3 "pc_or_label_ref" "")))]
""
"bb1%. %R3%C0,%1,%P2%P3"
"*
{
if (mostly_false_jump (insn, operands[0]))
return \"bb0%. %R2%C0,%1,%P2%P3\";
else
return \"bb1%. %R3%C0,%1,%P2%P3\";
}"
[(set_attr "type" "branch")])
;; SImode move instructions
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment