re PR target/64652 ([SH] ICE when using -mdiv=call-fp)

gcc/
	PR target/64652
	* config/sh/sh.md (udivsi3_i4, divsi3_i4): Make use of sfunc address
	reg appear first in the parallel.

gcc/testsuite/
	PR target/64652
	* gcc.target/sh/torture/pr64652.c: New.

From-SVN: r219824

gcc/ChangeLog

+2015-01-18  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/64652
+	* config/sh/sh.md (udivsi3_i4, divsi3_i4): Make use of sfunc address
+	reg appear first in the parallel.
+
 2015-01-18  Jan Hubicka  <hubicka@ucw.cz>
 
 	* ipa-reference.c (set_reference_optimization_summary,

gcc/config/sh/sh.md

@@ -2402,8 +2402,8 @@
    (clobber (reg:SI R4_REG))
    (clobber (reg:SI R5_REG))
    (clobber (reg:SI FPSCR_STAT_REG))
-   (use (reg:SI FPSCR_MODES_REG))
-   (use (match_operand:SI 1 "arith_reg_operand" "r"))]
+   (use (match_operand:SI 1 "arith_reg_operand" "r"))
+   (use (reg:SI FPSCR_MODES_REG))]
   "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
@@ -2674,8 +2674,8 @@
    (clobber (reg:DF DR0_REG))
    (clobber (reg:DF DR2_REG))
    (clobber (reg:SI FPSCR_STAT_REG))
-   (use (reg:SI FPSCR_MODES_REG))
-   (use (match_operand:SI 1 "arith_reg_operand" "r"))]
+   (use (match_operand:SI 1 "arith_reg_operand" "r"))
+   (use (reg:SI FPSCR_MODES_REG))]
   "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")

gcc/testsuite/ChangeLog

+2015-01-18  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/64652
+	* gcc.target/sh/torture/pr64652.c: New.
+
 2015-01-18  Jan Hubicka  <hubicka@ucw.cz>
 
 	* gcc.dg/ipa/ipa-icf-32.c: Update template.

gcc/testsuite/gcc.target/sh/torture/pr64652.c

+/* Check that using -mdiv=call-fp compiles without fuzz.  */
+/* { dg-do compile }  */
+/* { dg-additional-options "-mdiv=call-fp" }  */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } }  */
+
+int
+test (int a, int b, int c, int d)
+{
+  return (a / b) + c + d;
+}