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lvzhengyang
riscv-gcc-1
Commits
157735e8
Commit
157735e8
authored
Apr 25, 1994
by
Richard Kenner
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(TARGET_NO_FANCY_MATH_387): Implement new option.
From-SVN: r7152
parent
099800e3
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gcc/config/i386/i386.md
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gcc/config/i386/i386.md
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157735e8
...
...
@@ -2938,78 +2938,90 @@
(define_insn "sqrtsf2"
[
(set (match_operand:SF 0 "register_operand" "=f")
(sqrt:SF (match_operand:SF 1 "general_operand" "0")))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt")
(define_insn "sqrtdf2"
[
(set (match_operand:DF 0 "register_operand" "=f")
(sqrt:DF (match_operand:DF 1 "general_operand" "0")))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt")
(define_insn ""
[
(set (match_operand:DF 0 "register_operand" "=f")
(sqrt:DF (float_extend:DF
(match_operand:SF 1 "general_operand" "0"))))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt")
(define_insn "sqrtxf2"
[
(set (match_operand:XF 0 "register_operand" "=f")
(sqrt:XF (match_operand:XF 1 "general_operand" "0")))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt")
(define_insn ""
[
(set (match_operand:XF 0 "register_operand" "=f")
(sqrt:XF (float_extend:XF
(match_operand:DF 1 "general_operand" "0"))))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt")
(define_insn ""
[
(set (match_operand:XF 0 "register_operand" "=f")
(sqrt:XF (float_extend:XF
(match_operand:SF 1 "general_operand" "0"))))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt")
(define_insn "sindf2"
[
(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF
[
(match_operand:DF 1 "register_operand" "0")
]
1))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsin")
(define_insn "sinsf2"
[
(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF
[
(match_operand:SF 1 "register_operand" "0")
]
1))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsin")
(define_insn ""
[
(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF
[
(float_extend:DF
(match_operand:SF 1 "register_operand" "0"))] 1))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsin")
(define_insn "cosdf2"
[
(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF
[
(match_operand:DF 1 "register_operand" "0")
]
2))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fcos")
(define_insn "cossf2"
[
(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF
[
(match_operand:SF 1 "register_operand" "0")
]
2))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fcos")
(define_insn ""
[
(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF
[
(float_extend:DF
(match_operand:SF 1 "register_operand" "0"))] 2))]
"TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math)"
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fcos")
;;- one complement instructions
...
...
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