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riscv-gcc-1
Commit 157371cf by Alexandre Oliva Committed by Alexandre Oliva
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Introduce sh2a support. 

2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
* config.gcc: Build multilibs for sh2a and sh2a-single by
default.
* config/sh/sh.h (SUPPORT_SH2A, SUPPORT_SH2A_SINGLE): Define by
default.  Split their tests out of the corresponding SH4
multilibs.
* config/sh/t-sh (MULTILIB_MATCHES): Don't ever use SH4 or SH4a
multilibs for SH2a.
2004-07-28  Alexandre Oliva  <aoliva@redhat.com>
* config.gcc: Handle sh2a multilibs and cpu selection.
* config/sh/sh.h: Likewise.  Handle sh2a command line flags.
* config/sh/t-mlib-sh2a: New.
* config/sh/t-mlib-sh2a-nofpu: New.
* config/sh/t-mlib-sh2a-single: New.
* config/sh/t-mlib-sh2a-single-only: New.
2004-07-09  Nick Clifton  <nickc@redhat.com>
Issue 43400
* config/sh/sh.h (DRIVER_SELF_SPECS): Issue an error message if
-ml and -m2a are used together.
2004-03-23  DJ Delorie  <dj@redhat.com>
* config/sh/sh.c (sh_builtin_saveregs): Use the double code only
when we have a double-sized FPU.
2004-02-24  Corinna Vinschen <vinschen@redhat.com>
* config/sh/lib1funcs.asm (set_fpscr): Don't build if __SH2A_NOFPU__
is set.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Add cases for -msh2a-nofpu,
-msh2a-single and -msh2a-single-only
2004-02-24  Corinna Vinschen <vinschen@redhat.com>
* config/sh/crt1.asm: Don't generate FPU instructions if __SH2A_NOFPU__
is set.
2004-02-20  DJ Delorie  <dj@delorie.com>
* config/sh/sh.md (movsf_i, movsf_ie, movsf, ble, bge): Disable for sh2a-nofpu.
2004-02-20  Fred Fish <fnf@redhat.com>,
Corinna Vinschen <vinschen@redhat.com>
* config/sh/t-sh (MULTILIB_OPTIONS): Add 2a-nofpu.
(MULTILIB_EXCEPTIONS): Don't build littel-endian on sh2a.
2004-02-18  DJ Delorie  <dj@redhat.com>
* config/sh/sh.c (broken_move): Add support for movi20.
* config/sh/sh.h: Likewise.
(SHIFT_COUNT_TRUNCATED): Set for sh2a.
* config/sh/sh.md (udivsi3_sh2a): New.
(udivsi3): Call it.
(divsi3_sh2a): New.
(divsi3): Call it.
(mul_r): New.
(ashlsi3_sh2a): New.
(ashrsi3_sh2a): New.
(lshrsi3_sh2a): New.
(movsi_i): Disable for sh2a.
(movsi_ie): Add movi20.
(movsf_i, movsf_ie, movsf, ble, untyped_call): Explicitly enable
sh2a, for -m2a-nofpu mode.
2004-02-13  DJ Delorie  <dj@redhat.com>
* config/sh/lib1funcs.asm: Handle double vs single better.
* config/sh/sh.h: Likewise.
2004-02-09  DJ Delorie  <dj@redhat.com>
* config/sh/crt1.asm: Add support for sh2a.
* config/sh/elf.h: Likewise.
* config/sh/lib1funcs.asm: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/sh.h: Likewise.
* config/sh/t-sh: Likewise.

From-SVN: r85286
parent 6f4c062b
Showing with 143 additions and 25 deletions
gcc/ChangeLog
2004-07-29 Alexandre Oliva <aoliva@redhat.com>
Introduce sh2a support.
2004-07-29 Alexandre Oliva <aoliva@redhat.com>
* config.gcc: Build multilibs for sh2a and sh2a-single by
default.
* config/sh/sh.h (SUPPORT_SH2A, SUPPORT_SH2A_SINGLE): Define by
default. Split their tests out of the corresponding SH4
multilibs.
* config/sh/t-sh (MULTILIB_MATCHES): Don't ever use SH4 or SH4a
multilibs for SH2a.
2004-07-28 Alexandre Oliva <aoliva@redhat.com>
* config.gcc: Handle sh2a multilibs and cpu selection.
* config/sh/sh.h: Likewise. Handle sh2a command line flags.
* config/sh/t-mlib-sh2a: New.
* config/sh/t-mlib-sh2a-nofpu: New.
* config/sh/t-mlib-sh2a-single: New.
* config/sh/t-mlib-sh2a-single-only: New.
2004-07-09 Nick Clifton <nickc@redhat.com>
Issue 43400
* config/sh/sh.h (DRIVER_SELF_SPECS): Issue an error message if
-ml and -m2a are used together.
2004-03-23 DJ Delorie <dj@redhat.com>
* config/sh/sh.c (sh_builtin_saveregs): Use the double code only
when we have a double-sized FPU.
2004-02-24 Corinna Vinschen <vinschen@redhat.com>
* config/sh/lib1funcs.asm (set_fpscr): Don't build if __SH2A_NOFPU__
is set.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Add cases for -msh2a-nofpu,
-msh2a-single and -msh2a-single-only
2004-02-24 Corinna Vinschen <vinschen@redhat.com>
* config/sh/crt1.asm: Don't generate FPU instructions if __SH2A_NOFPU__
is set.
2004-02-20 DJ Delorie <dj@delorie.com>
* config/sh/sh.md (movsf_i, movsf_ie, movsf, ble, bge): Disable for sh2a-nofpu.
2004-02-20 Fred Fish <fnf@redhat.com>,
Corinna Vinschen <vinschen@redhat.com>
* config/sh/t-sh (MULTILIB_OPTIONS): Add 2a-nofpu.
(MULTILIB_EXCEPTIONS): Don't build littel-endian on sh2a.
2004-02-18 DJ Delorie <dj@redhat.com>
* config/sh/sh.c (broken_move): Add support for movi20.
* config/sh/sh.h: Likewise.
(SHIFT_COUNT_TRUNCATED): Set for sh2a.
* config/sh/sh.md (udivsi3_sh2a): New.
(udivsi3): Call it.
(divsi3_sh2a): New.
(divsi3): Call it.
(mul_r): New.
(ashlsi3_sh2a): New.
(ashrsi3_sh2a): New.
(lshrsi3_sh2a): New.
(movsi_i): Disable for sh2a.
(movsi_ie): Add movi20.
(movsf_i, movsf_ie, movsf, ble, untyped_call): Explicitly enable
sh2a, for -m2a-nofpu mode.
2004-02-13 DJ Delorie <dj@redhat.com>
* config/sh/lib1funcs.asm: Handle double vs single better.
* config/sh/sh.h: Likewise.
2004-02-09 DJ Delorie <dj@redhat.com>
* config/sh/crt1.asm: Add support for sh2a.
* config/sh/elf.h: Likewise.
* config/sh/lib1funcs.asm: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/sh.h: Likewise.
* config/sh/t-sh: Likewise.
2004-07-28 Alexandre Oliva <aoliva@redhat.com> 2004-07-28 Alexandre Oliva <aoliva@redhat.com>
* config/frv/frv.md (movqi_internal, movhi_internal, * config/frv/frv.md (movqi_internal, movhi_internal,
......
gcc/config.gcc
...@@ -1757,6 +1757,10 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ ...@@ -1757,6 +1757,10 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
sh4* | sh-superh-*) sh_cpu_target=sh4 ;; sh4* | sh-superh-*) sh_cpu_target=sh4 ;;
sh3e*) sh_cpu_target=sh3e ;; sh3e*) sh_cpu_target=sh3e ;;
sh*-*-netbsd* | sh3*) sh_cpu_target=sh3 ;; sh*-*-netbsd* | sh3*) sh_cpu_target=sh3 ;;
sh2a_single_only*) sh_cpu_target=sh2a-single-only ;;
sh2a_single*) sh_cpu_target=sh2a-single ;;
sh2a_nofpu*) sh_cpu_target=sh2a-nofpu ;;
sh2a*) sh_cpu_target=sh2a ;;
sh2e*) sh_cpu_target=sh2e ;; sh2e*) sh_cpu_target=sh2e ;;
sh2*) sh_cpu_target=sh2 ;; sh2*) sh_cpu_target=sh2 ;;
*) sh_cpu_target=sh1 ;; *) sh_cpu_target=sh1 ;;
...@@ -1765,6 +1769,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ ...@@ -1765,6 +1769,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
case $sh_cpu_default in case $sh_cpu_default in
sh5-64media-nofpu | sh5-64media | \ sh5-64media-nofpu | sh5-64media | \
sh5-32media-nofpu | sh5-32media | sh5-compact-nofpu | sh5-compact | \ sh5-32media-nofpu | sh5-32media | sh5-compact-nofpu | sh5-compact | \
sh2a-single-only | sh2a-single | sh2a-nofpu | sh2a | \
sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \ sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \
sh4-single-only | sh4-single | sh4-nofpu | sh4 | \ sh4-single-only | sh4-single | sh4-nofpu | sh4 | \
sh3e | sh3 | sh2e | sh2 | sh1) ;; sh3e | sh3 | sh2e | sh2 | sh1) ;;
...@@ -1779,7 +1784,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ ...@@ -1779,7 +1784,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;; sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
sh*-*-linux*) sh_multilibs=m1,m3e,m4 ;; sh*-*-linux*) sh_multilibs=m1,m3e,m4 ;;
sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;; sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;;
*) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only ;; *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
esac esac
fi fi
target_cpu_default=SELECT_`echo ${sh_cpu_default}|tr a-z- A-Z_` target_cpu_default=SELECT_`echo ${sh_cpu_default}|tr a-z- A-Z_`
...@@ -1790,6 +1795,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ ...@@ -1790,6 +1795,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
sh1 | sh2 | sh2e | sh3 | sh3e | \ sh1 | sh2 | sh2e | sh3 | sh3e | \
sh4 | sh4-single | sh4-single-only | sh4-nofpu | \ sh4 | sh4-single | sh4-single-only | sh4-nofpu | \
sh4a | sh4a-single | sh4a-single-only | sh4a-nofpu | sh4al | \ sh4a | sh4a-single | sh4a-single-only | sh4a-nofpu | sh4al | \
sh2a | sh2a-single | sh2a-single-only | sh2a-nofpu | \
sh5-64media | sh5-64media-nofpu | \ sh5-64media | sh5-64media-nofpu | \
sh5-32media | sh5-32media-nofpu | \ sh5-32media | sh5-32media-nofpu | \
sh5-compact | sh5-compact-nofpu) sh5-compact | sh5-compact-nofpu)
...@@ -1803,7 +1809,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ ...@@ -1803,7 +1809,7 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
esac esac
done done
if test x${enable_incomplete_targets} == xyes ; then if test x${enable_incomplete_targets} == xyes ; then
tm_defines="$tm_defines SUPPORT_SH1 SUPPORT_SH2E SUPPORT_SH4 SUPPORT_SH4_SINGLE SUPPORT_SH5_32MEDIA SUPPORT_SH5_32MEDIA_NOFPU SUPPORT_SH5_64MEDIA SUPPORT_SH5_64MEDIA_NOFPU" tm_defines="$tm_defines SUPPORT_SH1 SUPPORT_SH2E SUPPORT_SH4 SUPPORT_SH4_SINGLE SUPPORT_SH2A SUPPORT_SH2A_SINGLE SUPPORT_SH5_32MEDIA SUPPORT_SH5_32MEDIA_NOFPU SUPPORT_SH5_64MEDIA SUPPORT_SH5_64MEDIA_NOFPU"
fi fi
use_fixproto=yes use_fixproto=yes
;; ;;
...@@ -2483,12 +2489,15 @@ fi ...@@ -2483,12 +2489,15 @@ fi
"" | m1 | m2 | m2e | m3 | m3e | m4 | m4-single | m4-single-only | m4-nofpu ) "" | m1 | m2 | m2e | m3 | m3e | m4 | m4-single | m4-single-only | m4-nofpu )
# OK # OK
;; ;;
m2a | m2a-single | m2a-single-only | m2a-nofpu)
;;
m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al) m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al)
;; ;;
*) *)
echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2 echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2
echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2 echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2
echo "m4a m4a-single m4a-single-only m4a-nofpu m4al" 1>&2 echo "m4a m4a-single m4a-single-only m4a-nofpu m4al" 1>&2
echo "m2a m2a-single m2a-single-only m2a-nofpu" 1>&2
exit 1 exit 1
;; ;;
esac esac
......
gcc/config/sh/crt1.asm
...@@ -72,7 +72,7 @@ start: ...@@ -72,7 +72,7 @@ start:
LOAD_ADDR (___data, r26) LOAD_ADDR (___data, r26)
LOAD_ADDR (___rodata, r27) LOAD_ADDR (___rodata, r27)
#if ! __SH4_NOFPU__ #if ! __SH4_NOFPU__ && ! __SH2A_NOFPU__
#if __SH5__ == 32 #if __SH5__ == 32
pt/l ___set_fpscr, tr0 pt/l ___set_fpscr, tr0
movi 0, r4 movi 0, r4
...@@ -116,12 +116,14 @@ start_l: ...@@ -116,12 +116,14 @@ start_l:
cmp/ge r0,r1 cmp/ge r0,r1
bt start_l bt start_l
#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) #if ! __SH2A_NOFPU__
#if defined (__SH2E__) || defined (__SH2A__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
mov.l set_fpscr_k, r1 mov.l set_fpscr_k, r1
jsr @r1 jsr @r1
mov #0,r4 mov #0,r4
lds r3,fpscr lds r3,fpscr
#endif /* defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */ #endif /* defined (__SH2E__) || defined (__SH2A__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
#endif /* ! __SH2A_NOFPU__ */
! arrange for exit to call fini ! arrange for exit to call fini
mov.l atexit_k,r0 mov.l atexit_k,r0
...@@ -146,10 +148,12 @@ start_l: ...@@ -146,10 +148,12 @@ start_l:
nop nop
.align 2 .align 2
#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) #if ! __SH2A_NOFPU__
#if defined (__SH2E__) || defined (__SH2A__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
set_fpscr_k: set_fpscr_k:
.long ___set_fpscr .long ___set_fpscr
#endif /* defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */ #endif /* defined (__SH2E__) || defined (__SH2A__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
#endif /* ! __SH2A_NOFPU__ */
stack_k: stack_k:
.long _stack .long _stack
......
gcc/config/sh/elf.h
...@@ -58,6 +58,10 @@ Boston, MA 02111-1307, USA. */ ...@@ -58,6 +58,10 @@ Boston, MA 02111-1307, USA. */
#define ASM_SPEC SH_ASM_SPEC #define ASM_SPEC SH_ASM_SPEC
#undef SUBTARGET_ASM_ISA_SPEC #undef SUBTARGET_ASM_ISA_SPEC
#define SUBTARGET_ASM_ISA_SPEC "\ #define SUBTARGET_ASM_ISA_SPEC "\
%{m2a:--isa=sh2a} \
%{m2a-single:--isa=sh2a} \
%{m2a-single-only:--isa=sh2a} \
%{m2a-nofpu:--isa=sh2a-nofpu} \
%{m5-compact*:--isa=SHcompact} %{m5-32media*:--isa=SHmedia --abi=32} \ %{m5-compact*:--isa=SHcompact} %{m5-32media*:--isa=SHmedia --abi=32} \
%{m5-64media*:--isa=SHmedia --abi=64}" ASM_ISA_DEFAULT_SPEC %{m5-64media*:--isa=SHmedia --abi=64}" ASM_ISA_DEFAULT_SPEC
......
gcc/config/sh/lib1funcs.asm
...@@ -56,6 +56,11 @@ Boston, MA 02111-1307, USA. */ ...@@ -56,6 +56,11 @@ Boston, MA 02111-1307, USA. */
#define FMOVD_WORKS #define FMOVD_WORKS
#endif #endif
#ifdef __SH2A__
#undef FMOVD_WORKS
#define FMOVD_WORKS
#endif
#if ! __SH5__ #if ! __SH5__
#ifdef L_ashiftrt #ifdef L_ashiftrt
.global GLOBAL(ashiftrt_r4_0) .global GLOBAL(ashiftrt_r4_0)
...@@ -1936,7 +1941,8 @@ GLOBAL(moddi3): ...@@ -1936,7 +1941,8 @@ GLOBAL(moddi3):
#endif /* L_moddi3 */ #endif /* L_moddi3 */
#ifdef L_set_fpscr #ifdef L_set_fpscr
#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || __SH5__ == 32 #if !defined (__SH2A_NOFPU__)
#if defined (__SH2E__) || defined (__SH2A__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || __SH5__ == 32
#ifdef __SH5__ #ifdef __SH5__
.mode SHcompact .mode SHcompact
#endif #endif
...@@ -1960,7 +1966,7 @@ GLOBAL(set_fpscr): ...@@ -1960,7 +1966,7 @@ GLOBAL(set_fpscr):
#ifndef FMOVD_WORKS #ifndef FMOVD_WORKS
xor #16,r0 xor #16,r0
#endif #endif
#if defined(__SH4__) #if defined(__SH4__) || defined (__SH2A_DOUBLE__)
swap.w r0,r3 swap.w r0,r3
mov.l r3,@(4,r1) mov.l r3,@(4,r1)
#else /* defined (__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE*__) */ #else /* defined (__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE*__) */
...@@ -1972,7 +1978,7 @@ GLOBAL(set_fpscr): ...@@ -1972,7 +1978,7 @@ GLOBAL(set_fpscr):
#else #else
xor #24,r0 xor #24,r0
#endif #endif
#if defined(__SH4__) #if defined(__SH4__) || defined (__SH2A_DOUBLE__)
swap.w r0,r2 swap.w r0,r2
rts rts
mov.l r2,@r1 mov.l r2,@r1
...@@ -2001,6 +2007,7 @@ LOCAL(set_fpscr_L1): ...@@ -2001,6 +2007,7 @@ LOCAL(set_fpscr_L1):
#endif /* ELF */ #endif /* ELF */
#endif /* NO_FPSCR_VALUES */ #endif /* NO_FPSCR_VALUES */
#endif /* SH2E / SH3E / SH4 */ #endif /* SH2E / SH3E / SH4 */
#endif /* __SH2A_NOFPU__ */
#endif /* L_set_fpscr */ #endif /* L_set_fpscr */
#ifdef L_ic_invalidate #ifdef L_ic_invalidate
#if __SH5__ == 32 #if __SH5__ == 32
......
gcc/config/sh/sh.c
...@@ -1111,7 +1111,7 @@ prepare_scc_operands (enum rtx_code code) ...@@ -1111,7 +1111,7 @@ prepare_scc_operands (enum rtx_code code)
|| (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT)) || (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT))
sh_compare_op1 = force_reg (mode, sh_compare_op1); sh_compare_op1 = force_reg (mode, sh_compare_op1);
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT) if ((TARGET_SH4 || TARGET_SH2A) && GET_MODE_CLASS (mode) == MODE_FLOAT)
(mode == SFmode ? emit_sf_insn : emit_df_insn) (mode == SFmode ? emit_sf_insn : emit_df_insn)
(gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx_SET (VOIDmode, t_reg, gen_rtx_SET (VOIDmode, t_reg,
...@@ -1156,7 +1156,7 @@ from_compare (rtx *operands, int code) ...@@ -1156,7 +1156,7 @@ from_compare (rtx *operands, int code)
gen_rtx_REG (SImode, T_REG), gen_rtx_REG (SImode, T_REG),
gen_rtx_fmt_ee (code, SImode, gen_rtx_fmt_ee (code, SImode,
sh_compare_op0, sh_compare_op1)); sh_compare_op0, sh_compare_op1));
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT) if ((TARGET_SH4 || TARGET_SH2A) && GET_MODE_CLASS (mode) == MODE_FLOAT)
{ {
insn = gen_rtx_PARALLEL (VOIDmode, insn = gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, insn, gen_rtvec (2, insn,
...@@ -3066,6 +3066,10 @@ broken_move (rtx insn) ...@@ -3066,6 +3066,10 @@ broken_move (rtx insn)
== SCRATCH)) == SCRATCH))
&& GET_CODE (SET_DEST (pat)) == REG && GET_CODE (SET_DEST (pat)) == REG
&& FP_REGISTER_P (REGNO (SET_DEST (pat)))) && FP_REGISTER_P (REGNO (SET_DEST (pat))))
&& ! (TARGET_SH2A
&& GET_MODE (SET_DEST (pat)) == SImode
&& GET_CODE (SET_SRC (pat)) == CONST_INT
&& CONST_OK_FOR_I20 (INTVAL (SET_SRC (pat))))
&& (GET_CODE (SET_SRC (pat)) != CONST_INT && (GET_CODE (SET_SRC (pat)) != CONST_INT
|| ! CONST_OK_FOR_I08 (INTVAL (SET_SRC (pat))))) || ! CONST_OK_FOR_I08 (INTVAL (SET_SRC (pat)))))
return 1; return 1;
...@@ -3810,6 +3814,10 @@ fixup_addr_diff_vecs (rtx first) ...@@ -3810,6 +3814,10 @@ fixup_addr_diff_vecs (rtx first)
if (GET_CODE (x) == LABEL_REF && XEXP (x, 0) == vec_lab) if (GET_CODE (x) == LABEL_REF && XEXP (x, 0) == vec_lab)
break; break;
} }
/* FIXME: This is a bug in the optimizer, but it seems harmless
to just avoid panicing. */
if (!prev)
continue;
/* Emit the reference label of the braf where it belongs, right after /* Emit the reference label of the braf where it belongs, right after
the casesi_jump_2 (i.e. braf). */ the casesi_jump_2 (i.e. braf). */
...@@ -4786,8 +4794,12 @@ output_stack_adjust (int size, rtx reg, int epilogue_p, ...@@ -4786,8 +4794,12 @@ output_stack_adjust (int size, rtx reg, int epilogue_p,
{ {
HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT; HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT;
/* This test is bogus, as output_stack_adjust is used to re-align the
stack. */
#if 0
if (size % align) if (size % align)
abort (); abort ();
#endif
if (CONST_OK_FOR_ADD (size)) if (CONST_OK_FOR_ADD (size))
emit_fn (GEN_ADD3 (reg, reg, GEN_INT (size))); emit_fn (GEN_ADD3 (reg, reg, GEN_INT (size)));
...@@ -4948,7 +4960,7 @@ push (int rn) ...@@ -4948,7 +4960,7 @@ push (int rn)
x = gen_push_fpul (); x = gen_push_fpul ();
else if (rn == FPSCR_REG) else if (rn == FPSCR_REG)
x = gen_push_fpscr (); x = gen_push_fpscr ();
else if (TARGET_SH4 && TARGET_FMOVD && ! TARGET_FPU_SINGLE else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && ! TARGET_FPU_SINGLE
&& FP_OR_XD_REGISTER_P (rn)) && FP_OR_XD_REGISTER_P (rn))
{ {
if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1) if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1)
...@@ -4977,7 +4989,7 @@ pop (int rn) ...@@ -4977,7 +4989,7 @@ pop (int rn)
x = gen_pop_fpul (); x = gen_pop_fpul ();
else if (rn == FPSCR_REG) else if (rn == FPSCR_REG)
x = gen_pop_fpscr (); x = gen_pop_fpscr ();
else if (TARGET_SH4 && TARGET_FMOVD && ! TARGET_FPU_SINGLE else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && ! TARGET_FPU_SINGLE
&& FP_OR_XD_REGISTER_P (rn)) && FP_OR_XD_REGISTER_P (rn))
{ {
if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1) if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1)
...@@ -5095,11 +5107,11 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) ...@@ -5095,11 +5107,11 @@ calc_live_regs (HARD_REG_SET *live_regs_mask)
interrupt_handler = sh_cfun_interrupt_handler_p (); interrupt_handler = sh_cfun_interrupt_handler_p ();
CLEAR_HARD_REG_SET (*live_regs_mask); CLEAR_HARD_REG_SET (*live_regs_mask);
if (TARGET_SH4 && TARGET_FMOVD && interrupt_handler if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && interrupt_handler
&& regs_ever_live[FPSCR_REG]) && regs_ever_live[FPSCR_REG])
target_flags &= ~FPU_SINGLE_BIT; target_flags &= ~FPU_SINGLE_BIT;
/* If we can save a lot of saves by switching to double mode, do that. */ /* If we can save a lot of saves by switching to double mode, do that. */
else if (TARGET_SH4 && TARGET_FMOVD && TARGET_FPU_SINGLE) else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && TARGET_FPU_SINGLE)
for (count = 0, reg = FIRST_FP_REG; reg <= LAST_FP_REG; reg += 2) for (count = 0, reg = FIRST_FP_REG; reg <= LAST_FP_REG; reg += 2)
if (regs_ever_live[reg] && regs_ever_live[reg+1] if (regs_ever_live[reg] && regs_ever_live[reg+1]
&& (! call_used_regs[reg] || (interrupt_handler && ! pragma_trapa)) && (! call_used_regs[reg] || (interrupt_handler && ! pragma_trapa))
...@@ -5172,7 +5184,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) ...@@ -5172,7 +5184,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask)
SET_HARD_REG_BIT (*live_regs_mask, reg); SET_HARD_REG_BIT (*live_regs_mask, reg);
count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg)); count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg));
if ((TARGET_SH4 || TARGET_SH5) && TARGET_FMOVD if ((TARGET_SH4 || TARGET_SH2A_DOUBLE || TARGET_SH5) && TARGET_FMOVD
&& GET_MODE_CLASS (REGISTER_NATURAL_MODE (reg)) == MODE_FLOAT) && GET_MODE_CLASS (REGISTER_NATURAL_MODE (reg)) == MODE_FLOAT)
{ {
if (FP_REGISTER_P (reg)) if (FP_REGISTER_P (reg))
...@@ -6194,7 +6206,7 @@ sh_builtin_saveregs (void) ...@@ -6194,7 +6206,7 @@ sh_builtin_saveregs (void)
emit_move_insn (fpregs, XEXP (regbuf, 0)); emit_move_insn (fpregs, XEXP (regbuf, 0));
emit_insn (gen_addsi3 (fpregs, fpregs, emit_insn (gen_addsi3 (fpregs, fpregs,
GEN_INT (n_floatregs * UNITS_PER_WORD))); GEN_INT (n_floatregs * UNITS_PER_WORD)));
if (TARGET_SH4) if (TARGET_SH4 || TARGET_SH2A_DOUBLE)
{ {
rtx mem; rtx mem;
for (regno = NPARM_REGS (DFmode) - 2; regno >= first_floatreg; regno -= 2) for (regno = NPARM_REGS (DFmode) - 2; regno >= first_floatreg; regno -= 2)
...@@ -6838,7 +6850,7 @@ sh_function_arg_advance (CUMULATIVE_ARGS *ca, enum machine_mode mode, ...@@ -6838,7 +6850,7 @@ sh_function_arg_advance (CUMULATIVE_ARGS *ca, enum machine_mode mode,
} }
} }
if (! (TARGET_SH4 || ca->renesas_abi) if (! ((TARGET_SH4 || TARGET_SH2A) || ca->renesas_abi)
|| PASS_IN_REG_P (*ca, mode, type)) || PASS_IN_REG_P (*ca, mode, type))
(ca->arg_count[(int) GET_SH_ARG_CLASS (mode)] (ca->arg_count[(int) GET_SH_ARG_CLASS (mode)]
= (ROUND_REG (*ca, mode) = (ROUND_REG (*ca, mode)
...@@ -7565,7 +7577,10 @@ tertiary_reload_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) ...@@ -7565,7 +7577,10 @@ tertiary_reload_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
int int
fpscr_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) fpscr_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{ {
return (GET_CODE (op) == REG && REGNO (op) == FPSCR_REG return (GET_CODE (op) == REG
&& (REGNO (op) == FPSCR_REG
|| (REGNO (op) >= FIRST_PSEUDO_REGISTER
&& !(reload_in_progress || reload_completed)))
&& GET_MODE (op) == PSImode); && GET_MODE (op) == PSImode);
} }
......
gcc/config/sh/t-mlib-sh2a-nofpu 0 → 100644
ML_sh2a_nofpu=m2a-nofpu/
gcc/config/sh/t-mlib-sh2a-single 0 → 100644
ML_sh2a_single=m2a-single/
gcc/config/sh/t-mlib-sh2a-single-only 0 → 100644
ML_sh2a_single_only=m2a-single-only/
gcc/config/sh/t-sh
...@@ -22,15 +22,19 @@ fp-bit.c: $(srcdir)/config/fp-bit.c ...@@ -22,15 +22,19 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c cat $(srcdir)/config/fp-bit.c >> fp-bit.c
MULTILIB_ENDIAN = ml/mb MULTILIB_ENDIAN = ml/mb
MULTILIB_CPUS= $(ML_sh1)$(ML_sh2e)$(ML_sh2)$(ML_sh3e)$(ML_sh3)$(ML_sh4_nofpu)$(ML_sh4_single_only)$(ML_sh4_single)$(ML_sh4)$(ML_sh4a_nofpu)$(ML_sh4a_single_only)$(ML_sh4a_single)$(ML_sh4a)$(ML_m5_32media)$(ML_m5_32media_nofpu)$(ML_m5_compact)$(ML_m5_compact_nofpu)$(ML_m5_64media)$(ML_m5_64media_nofpu) MULTILIB_CPUS= $(ML_sh1)$(ML_sh2a)$(ML_sh2a_nofpu)$(ML_sh2a_single_only)$(ML_sh2a_single)$(ML_sh2e)$(ML_sh2)$(ML_sh3e)$(ML_sh3)$(ML_sh4_nofpu)$(ML_sh4_single_only)$(ML_sh4_single)$(ML_sh4)$(ML_sh4a_nofpu)$(ML_sh4a_single_only)$(ML_sh4a_single)$(ML_sh4a)$(ML_m5_32media)$(ML_m5_32media_nofpu)$(ML_m5_compact)$(ML_m5_compact_nofpu)$(ML_m5_64media)$(ML_m5_64media_nofpu)
MULTILIB_OPTIONS= $(MULTILIB_ENDIAN) $(MULTILIB_CPUS:/=) MULTILIB_OPTIONS= $(MULTILIB_ENDIAN) $(MULTILIB_CPUS:/=)
MULTILIB_DIRNAMES= MULTILIB_DIRNAMES=
#MULTILIB_MATCHES = m2=m3 m2e=m3e m2=m4-nofpu
# The separate entries for m2a-nofpu and m2a-single-only with
# duplicate base libraries are there to make sure we don't ever use an
# m4* multilib for m2a or vice-versa; they are not compatible. This
# is why sh2a and sh2a-single need their own multilibs.
MULTILIB_MATCHES = $(shell \ MULTILIB_MATCHES = $(shell \
multilibs="$(MULTILIB_OPTIONS)" ; \ multilibs="$(MULTILIB_OPTIONS)" ; \
for abi in m1,m2,m3,m4-nofpu,m4al,m4a-nofpu \ for abi in m1,m2,m3,m4-nofpu,m4al,m4a-nofpu m1,m2,m2a-nofpu \
m2e,m3e,m4-single-only,m4a-single-only \ m2e,m3e,m4-single-only,m4a-single-only m2e,m2a-single-only \
m4-single,m4a-single m4,m4a \ m4-single,m4a-single m4,m4a \
m5-32media,m5-compact,m5-32media \ m5-32media,m5-compact,m5-32media \
m5-32media-nofpu,m5-compact-nofpu,m5-32media-nofpu; do \ m5-32media-nofpu,m5-compact-nofpu,m5-32media-nofpu; do \
...@@ -45,7 +49,7 @@ MULTILIB_MATCHES = $(shell \ ...@@ -45,7 +49,7 @@ MULTILIB_MATCHES = $(shell \
done) done)
# SH1 only supports big endian. # SH1 only supports big endian.
MULTILIB_EXCEPTIONS = ml/m1 MULTILIB_EXCEPTIONS = ml/m1 ml/m2a*
LIBGCC = stmp-multilib LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib INSTALL_LIBGCC = install-multilib
...@@ -62,3 +66,7 @@ gt-sh.h : s-gtype ; @true ...@@ -62,3 +66,7 @@ gt-sh.h : s-gtype ; @true
# These are not suitable for COFF. # These are not suitable for COFF.
# EXTRA_MULTILIB_PARTS= crt1.o crti.o crtn.o crtbegin.o crtend.o # EXTRA_MULTILIB_PARTS= crt1.o crti.o crtn.o crtbegin.o crtend.o
# Local Variables:
# mode: Makefile
# End:
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