MSP430: Fix memory offsets used by %C and %D asm output operand modifiers

The %C and %D operand modifiers are supposed to access the 3rd and 4th
words of a 64-bit value, so for memory references they need to offset
the given address by 4 and 6 bytes respectively.

gcc/ChangeLog:

2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
	reference by 4 bytes, and %D memory reference by 6 bytes.

gcc/testsuite/ChangeLog:

2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/operand-modifiers.c: New test.

gcc/ChangeLog

+2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+
+	* config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
+	reference by 4 bytes, and %D memory reference by 6 bytes.
+
 2020-04-11  Uroš Bizjak  <ubizjak@gmail.com>
 
 	PR target/94494

gcc/config/msp430/msp430.c

@@ -3492,7 +3492,7 @@ msp430_print_operand (FILE * file, rtx op, int letter)
       switch (GET_CODE (op))
 	{
 	case MEM:
-	  op = adjust_address (op, Pmode, 3);
+	  op = adjust_address (op, Pmode, 4);
 	  break;
 	case REG:
 	  op = gen_rtx_REG (Pmode, REGNO (op) + 2);
@@ -3510,7 +3510,7 @@ msp430_print_operand (FILE * file, rtx op, int letter)
       switch (GET_CODE (op))
 	{
 	case MEM:
-	  op = adjust_address (op, Pmode, 4);
+	  op = adjust_address (op, Pmode, 6);
 	  break;
 	case REG:
 	  op = gen_rtx_REG (Pmode, REGNO (op) + 3);

gcc/testsuite/ChangeLog

+2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+
+	* gcc.target/msp430/operand-modifiers.c: New test.
+
 2020-04-12  Thomas Koenig  <tkoenig@gcc.gnu.org>
 
 	PR fortran/94091

gcc/testsuite/gcc.target/msp430/operand-modifiers.c

+volatile unsigned long si = 0x89abcdef;
+volatile unsigned long long di = 0xfedcba9876543210;
+
+unsigned int a, b, c, d;
+
+int
+main (void)
+{
+  /* Check that %A and %B extract the low and high words of a 32-bit value,
+     respectively.  */
+  __asm__("mov %A1, %0\n" : "=m" (a) : "m" (si));
+  __asm__("mov %B1, %0\n" : "=m" (b) : "m" (si));
+  if (a != ((unsigned)si)
+      || b != ((unsigned)(si >> 16)))
+    return 1;
+
+  /* Check that %A, %B, %C and %D extract the 1st, 2nd, 3rd and 4th words of a
+     64-bit value, respectively.  */
+  __asm__("mov %A1, %0\n" : "=m" (a) : "m" (di));
+  __asm__("mov %B1, %0\n" : "=m" (b) : "m" (di));
+  __asm__("mov %C1, %0\n" : "=m" (c) : "m" (di));
+  __asm__("mov %D1, %0\n" : "=m" (d) : "m" (di));
+  if (a != ((unsigned)di)
+      || b != ((unsigned)(di >> 16))
+      || c != ((unsigned)(di >> 32))
+      || d != ((unsigned)(di >> 48)))
+    return 1;
+
+  return 0;
+}