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riscv-gcc-1
Commit 145870b5 by Nick Clifton Committed by Jeff Law
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v850.c (register_is_ok_for_epilogue, [...]): New functions. 

        * config/v850/v850.c (register_is_ok_for_epilogue,
        pattern_is_ok_for_epilogue, construct_restore_jr,
        pattern_is_ok_for_prologue, construct_save_jarl): New functions.

        * config/v850/v850.h (pattern_is_ok_for_prologue,
        pattern_is_ok_for_epilogue, register_is_ok_for_epilogue): New
        predicates.

        * config/v850/v850.md: Replace prologue and epilogue patterns with a
        match_parallel pattern.

        * config/v850/v850.c (output_move_single_unsigned): Cope with zero
        extending and moving between registers at the same time.

Brought over from devo.

From-SVN: r15477
parent 9302e6e5
Showing with 62 additions and 11 deletions
gcc/ChangeLog
Tue Sep 16 00:13:20 1997 Nick Clifton <nickc@cygnus.com>
* config/v850/v850.c (register_is_ok_for_epilogue,
pattern_is_ok_for_epilogue, construct_restore_jr,
pattern_is_ok_for_prologue, construct_save_jarl): New functions.
* config/v850/v850.h (pattern_is_ok_for_prologue,
pattern_is_ok_for_epilogue, register_is_ok_for_epilogue): New
predicates.
* config/v850/v850.md: Replace prologue and epilogue patterns with a
match_parallel pattern.
* config/v850/v850.c (output_move_single_unsigned): Cope with zero
extending and moving between registers at the same time.
Mon Sep 15 22:53:01 1997 Jeffrey A Law (law@cygnus.com)
* aclocal.m4: Add replacement for AC_PROG_INSTALL.
......
gcc/config/v850/v850.h
......@@ -55,6 +55,16 @@ extern int target_flags;
#define MASK_PROLOG_FUNCTION 0x00000008
#define MASK_DEBUG 0x40000000
#define MASK_CPU 0x00000030
#define MASK_V850 0x00000010
#ifndef MASK_DEFAULT
#define MASK_DEFAULT MASK_V850
#endif
#define TARGET_V850 ((target_flags & MASK_CPU) == MASK_V850)
/* Macros used in the machine description to test the flags. */
/* The GHS calling convention support doesn't really work,
......@@ -117,7 +127,7 @@ extern int target_flags;
#endif
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT MASK_DEFAULT
#define TARGET_DEFAULT MASK_DEFAULT
#endif
/* Information about the various small memory areas. */
......@@ -458,18 +468,23 @@ enum reg_class {
#define INT_7_BITS(VALUE) ((unsigned) (VALUE) + 0x40 < 0x80)
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
/* 0 bits */
#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
/* 4 bits */
#define CONST_OK_FOR_J(VALUE) ((unsigned) (VALUE) + 0x10 < 0x20)
/* 15 bits */
#define CONST_OK_FOR_K(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
#define CONST_OK_FOR_L(VALUE) \
(((unsigned) ((int) (VALUE) >> 16) + 0x8000 < 0x10000) \
&& CONST_OK_FOR_I ((VALUE & 0xffff)))
#define CONST_OK_FOR_M(VALUE) ((unsigned)(VALUE) < 0x10000)
/* 16 bits */
#define CONST_OK_FOR_M(VALUE) ((unsigned)(VALUE) < 0x10000
#define CONST_OK_FOR_N(VALUE) ((unsigned) VALUE >= 0 && (unsigned) VALUE <= 31) /* 5 bit signed immediate in shift instructions */
#define CONST_OK_FOR_O(VALUE) 0
#define CONST_OK_FOR_P(VALUE) 0
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
(C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
......@@ -1390,6 +1405,9 @@ do { \
REG, SUBREG }}, \
{ "special_symbolref_operand", { SYMBOL_REF }}, \
{ "power_of_two_operand", { CONST_INT }}, \
{ "pattern_is_ok_for_prologue", { PARALLEL }}, \
{ "pattern_is_ok_for_epilogue", { PARALLEL }}, \
{ "register_is_ok_for_epilogue",{ REG }}, \
{ "not_power_of_two_operand", { CONST_INT }},
extern void override_options ();
......@@ -1415,3 +1433,11 @@ extern void expand_epilogue ();
extern void notice_update_cc ();
extern int v850_valid_machine_decl_attribute ();
extern int v850_interrupt_function_p ();
extern int pattern_is_ok_for_prologue();
extern int pattern_is_ok_for_epilogue();
extern int register_is_ok_for_epilogue ();
extern char *construct_save_jarl ();
extern char *construct_restore_jr ();
gcc/config/v850/v850.md
......@@ -181,6 +181,8 @@
(set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
(set_attr "type" "other,other,other,load,other,load,other,other,other")])
(define_expand "movdi"
[(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "general_operand" ""))]
......@@ -963,6 +965,7 @@
[(set_attr "length" "4")
(set_attr "cc" "set_znv")])
(define_insn "zero_extendqisi2"
[(set (match_operand:SI 0 "register_operand" "=r")
(zero_extend:SI
......@@ -974,12 +977,16 @@
;;- sign extension instructions
;; ??? This is missing a sign extend from memory pattern to match the ld.h
;; instruction.
(define_expand "extendhisi2"
[(set (match_dup 2)
(ashift:SI (match_operand:HI 1 "register_operand" "")
(const_int 16)))
(set (match_operand:SI 0 "register_operand" "")
(ashiftrt:SI (match_dup 2)
(ashiftrt:SI (match_dup 2)
(const_int 16)))]
""
"
......@@ -988,6 +995,10 @@
operands[2] = gen_reg_rtx (SImode);
}")
;; ??? This is missing a sign extend from memory pattern to match the ld.b
;; instruction.
(define_expand "extendqisi2"
[(set (match_dup 2)
(ashift:SI (match_operand:QI 1 "register_operand" "")
......@@ -1089,20 +1100,19 @@
;; RTXs. These RTXs will then be turned into a suitable call to a worker
;; function.
(define_insn ""
[(match_parallel 0 "pattern_is_ok_for_prologue"
[(set (reg:SI 3)
(plus:SI (reg:SI 3) (match_operand:SI 1 "immediate_operand" "i")))
(set (mem:SI
(plus:SI (reg:SI 3) (match_operand:SI 2 "immediate_operand" "i")))
(set (mem:SI (plus:SI (reg:SI 3)
(match_operand:SI 2 "immediate_operand" "i")))
(match_operand:SI 3 "register_is_ok_for_epilogue" "r"))])]
"TARGET_PROLOG_FUNCTION"
"* return construct_save_jarl (operands[0]);
"
[(set_attr "length" "4")
(set_attr "cc" "clobber")
]
)
(set_attr "cc" "clobber")])
;; Initialize an interrupt function. Do not depend on TARGET_PROLOG_FUNCTION.
......@@ -1139,6 +1149,7 @@
;; and possible a stack adjustment as well. These RTXs will be turned into
;; a suitable call to a worker function.
(define_insn ""
[(match_parallel 0 "pattern_is_ok_for_epilogue"
[(return)
......@@ -1151,9 +1162,7 @@
"* return construct_restore_jr (operands[0]);
"
[(set_attr "length" "4")
(set_attr "cc" "clobber")
]
)
(set_attr "cc" "clobber")])
;; Restore r1, r5, r10, and return from the interrupt
(define_insn "restore_interrupt"
......
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