Commit 13c508d9 by Graham Stott Committed by Graham Stott

mips.md (adddi3_internal_2+1): Remove contraints from define_split.


	* config/mips/mips.md (adddi3_internal_2+1): Remove contraints from
	define_split.
	(adddi3_internal_2+2): Likewise.
	(eh_set_lr_di+1): Likewise.

From-SVN: r45002
parent fc0b1d1a
2001-08-18 Graham Stott <grahams@redhat.com>
* config/mips/mips.md (adddi3_internal_2+1): Remove contraints from
define_split.
(adddi3_internal_2+2): Likewise.
(eh_set_lr_di+1): Likewise.
2001-08-17 Richard Henderson <rth@redhat.com> 2001-08-17 Richard Henderson <rth@redhat.com>
* defaults.h (UNALIGNED_SHORT_ASM_OP, UNALIGNED_INT_ASM_OP, * defaults.h (UNALIGNED_SHORT_ASM_OP, UNALIGNED_INT_ASM_OP,
......
...@@ -871,7 +871,7 @@ ...@@ -871,7 +871,7 @@
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(plus:DI (match_operand:DI 1 "register_operand" "") (plus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "small_int" ""))) (match_operand:DI 2 "small_int" "")))
(clobber (match_operand:SI 3 "register_operand" "=d"))] (clobber (match_operand:SI 3 "register_operand" ""))]
"reload_completed && !WORDS_BIG_ENDIAN && !TARGET_64BIT "reload_completed && !WORDS_BIG_ENDIAN && !TARGET_64BIT
&& !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16 && !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
...@@ -895,7 +895,7 @@ ...@@ -895,7 +895,7 @@
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(plus:DI (match_operand:DI 1 "register_operand" "") (plus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "small_int" ""))) (match_operand:DI 2 "small_int" "")))
(clobber (match_operand:SI 3 "register_operand" "=d"))] (clobber (match_operand:SI 3 "register_operand" ""))]
"reload_completed && WORDS_BIG_ENDIAN && !TARGET_64BIT "reload_completed && WORDS_BIG_ENDIAN && !TARGET_64BIT
&& !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16 && !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
...@@ -9546,8 +9546,8 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2" ...@@ -9546,8 +9546,8 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2"
"#") "#")
(define_split (define_split
[(unspec [(match_operand 0 "register_operand" "r")] 3) [(unspec [(match_operand 0 "register_operand" "")] 3)
(clobber (match_scratch 1 "=&r"))] (clobber (match_scratch 1 ""))]
"reload_completed" "reload_completed"
[(const_int 0)] [(const_int 0)]
" "
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment