Skip to content

R
riscv-gcc-1
Commit 12ce9562 by Richard Kenner
Options

(move{si,hi,qi,di}): Changed into define_expands. 

(move{si,hi,qi,di}): Changed into define_expands.  Split insns into
m68k and coldfire specific versions with appropriate constraints.

From-SVN: r13789
parent 6901b620
Showing with 82 additions and 142 deletions
gcc/config/m68k/m68k.md
......@@ -924,93 +924,39 @@
;; We do allow y and x regs since fixed point is allowed in them.
[(set (match_operand:SI 0 "general_operand" "=g,da,y,!*x*r*m")
(match_operand:SI 1 "general_operand" "daymKs,i,g,*x*r*m"))]
""
"!TARGET_5200"
"*
{
if (which_alternative == 3)
return \"fpmove%.l %x1,fpa0\;fpmove%.l fpa0,%x0\";
if (FPA_REG_P (operands[1]) || FPA_REG_P (operands[0]))
return \"fpmove%.l %x1,%x0\";
if (GET_CODE (operands[1]) == CONST_INT)
return output_move_simode_const (operands);
else if ((GET_CODE (operands[1]) == SYMBOL_REF
|| GET_CODE (operands[1]) == CONST)
&& push_operand (operands[0], SImode))
return \"pea %a1\";
else if ((GET_CODE (operands[1]) == SYMBOL_REF
|| GET_CODE (operands[1]) == CONST)
&& ADDRESS_REG_P (operands[0]))
return \"lea %a1,%0\";
return \"move%.l %1,%0\";
return output_move_simode (operands);
}")
(define_insn "movhi"
(define_insn ""
[(set (match_operand:SI 0 "general_operand" "=r<>,g")
(match_operand:SI 1 "general_operand" "g,r<>"))]
"TARGET_5200"
"* return output_move_simode (operands);")
(define_expand "movhi"
[(set (match_operand:HI 0 "general_operand" "")
(match_operand:HI 1 "general_operand" ""))]
""
"")
(define_insn ""
[(set (match_operand:HI 0 "general_operand" "=g")
(match_operand:HI 1 "general_operand" "g"))]
""
"*
{
if (GET_CODE (operands[1]) == CONST_INT)
{
if (operands[1] == const0_rtx
&& (DATA_REG_P (operands[0])
|| GET_CODE (operands[0]) == MEM)
/* clr insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
&& ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return \"clr%.w %0\";
else if (DATA_REG_P (operands[0])
&& INTVAL (operands[1]) < 128
&& INTVAL (operands[1]) >= -128)
{
#if defined(MOTOROLA) && !defined(CRDS)
return \"moveq%.l %1,%0\";
#else
return \"moveq %1,%0\";
#endif
}
else if (INTVAL (operands[1]) < 0x8000
&& INTVAL (operands[1]) >= -0x8000)
return \"move%.w %1,%0\";
}
else if (CONSTANT_P (operands[1]))
return \"move%.l %1,%0\";
#ifndef SGS_NO_LI
/* Recognize the insn before a tablejump, one that refers
to a table of offsets. Such an insn will need to refer
to a label on the insn. So output one. Use the label-number
of the table of offsets to generate this label. This code,
and similar code below, assumes that there will be at most one
reference to each table. */
if (GET_CODE (operands[1]) == MEM
&& GET_CODE (XEXP (operands[1], 0)) == PLUS
&& GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == LABEL_REF
&& GET_CODE (XEXP (XEXP (operands[1], 0), 0)) != PLUS)
{
rtx labelref = XEXP (XEXP (operands[1], 0), 1);
#if defined (MOTOROLA) && !defined (SGS_SWITCH_TABLES)
#ifdef SGS
asm_fprintf (asm_out_file, \"\\tset %LLI%d,.+2\\n\",
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#else /* not SGS */
asm_fprintf (asm_out_file, \"\\t.set %LLI%d,.+2\\n\",
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#endif /* not SGS */
#else /* SGS_SWITCH_TABLES or not MOTOROLA */
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"LI\",
CODE_LABEL_NUMBER (XEXP (labelref, 0)));
#ifdef SGS_SWITCH_TABLES
/* Set flag saying we need to define the symbol
LD%n (with value L%n-LI%n) at the end of the switch table. */
switch_table_difference_label_flag = 1;
#endif /* SGS_SWITCH_TABLES */
#endif /* SGS_SWITCH_TABLES or not MOTOROLA */
}
#endif /* SGS_NO_LI */
return \"move%.w %1,%0\";
}")
"!TARGET_5200"
"* return output_move_himode (operands);")
(define_insn ""
[(set (match_operand:HI 0 "general_operand" "=r<>,g")
(match_operand:HI 1 "general_operand" "g,r<>"))]
"TARGET_5200"
"* return output_move_himode (operands);")
(define_insn "movstricthi"
[(set (strict_low_part (match_operand:HI 0 "general_operand" "+dm"))
......@@ -1033,64 +979,23 @@
return \"move%.w %1,%0\";
}")
(define_insn "movqi"
[(set (match_operand:QI 0 "general_operand" "=d,*a,m")
(match_operand:QI 1 "general_operand" "dmi*a,di*a,dmi"))]
(define_expand "movqi"
[(set (match_operand:QI 0 "general_operand" "")
(match_operand:QI 1 "general_operand" ""))]
""
"*
{
rtx xoperands[4];
"")
/* This is probably useless, since it loses for pushing a struct
of several bytes a byte at a time. */
if (GET_CODE (operands[0]) == MEM
&& GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
&& XEXP (XEXP (operands[0], 0), 0) == stack_pointer_rtx
&& ! ADDRESS_REG_P (operands[1]))
{
xoperands[1] = operands[1];
xoperands[2]
= gen_rtx (MEM, QImode,
gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx));
/* Just pushing a byte puts it in the high byte of the halfword. */
/* We must put it in the low-order, high-numbered byte. */
output_asm_insn (\"move%.b %1,%-\;move%.b %@,%2\", xoperands);
return \"\";
}
(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=d,*a,m")
(match_operand:QI 1 "general_operand" "dmi*a,di*a,dmi"))]
"!TARGET_5200"
"* return output_move_qimode (operands);")
/* clr and st insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
if (!ADDRESS_REG_P (operands[0])
&& ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
{
if (operands[1] == const0_rtx)
return \"clr%.b %0\";
if ((!TARGET_5200 || DATA_REG_P (operands[0]))
&& GET_CODE (operands[1]) == CONST_INT
&& (INTVAL (operands[1]) & 255) == 255)
{
CC_STATUS_INIT;
return \"st %0\";
}
}
if (GET_CODE (operands[1]) == CONST_INT
&& DATA_REG_P (operands[0])
&& INTVAL (operands[1]) < 128
&& INTVAL (operands[1]) >= -128)
{
#if defined(MOTOROLA) && !defined(CRDS)
return \"moveq%.l %1,%0\";
#else
return \"moveq %1,%0\";
#endif
}
if (GET_CODE (operands[1]) != CONST_INT && CONSTANT_P (operands[1]))
return \"move%.l %1,%0\";
if (ADDRESS_REG_P (operands[0]) || ADDRESS_REG_P (operands[1]))
return \"move%.w %1,%0\";
return \"move%.b %1,%0\";
}")
(define_insn ""
[(set (match_operand:QI 0 "general_operand" "=r<>,g")
(match_operand:QI 1 "general_operand" "g,r<>"))]
"TARGET_5200"
"* return output_move_qimode (operands);")
(define_insn "movstrictqi"
[(set (strict_low_part (match_operand:QI 0 "general_operand" "+dm"))
......@@ -1107,12 +1012,18 @@
return \"move%.b %1,%0\";
}")
(define_insn "movsf"
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")
(match_operand:SF 1 "general_operand" ""))]
""
"")
(define_insn ""
[(set (match_operand:SF 0 "general_operand" "=rmf,x,y,rm,!x,!rm")
(match_operand:SF 1 "general_operand" "rmfF,xH,rmF,y,rm,x"))]
; [(set (match_operand:SF 0 "general_operand" "=rmf")
; (match_operand:SF 1 "general_operand" "rmfF"))]
""
"!TARGET_5200"
"*
{
if (which_alternative >= 4)
......@@ -1153,12 +1064,24 @@
return \"move%.l %1,%0\";
}")
(define_insn "movdf"
(define_insn ""
[(set (match_operand:SF 0 "general_operand" "=r,g")
(match_operand:SF 1 "general_operand" "g,r"))]
"TARGET_5200"
"* return \"move%.l %1,%0\";")
(define_expand "movdf"
[(set (match_operand:DF 0 "general_operand" "")
(match_operand:DF 1 "general_operand" ""))]
""
"")
(define_insn ""
[(set (match_operand:DF 0 "general_operand" "=rm,rf,rf,&rof<>,y,rm,x,!x,!rm")
(match_operand:DF 1 "general_operand" "rf,m,0,rofE<>,rmE,y,xH,rm,x"))]
; [(set (match_operand:DF 0 "general_operand" "=rm,&rf,&rof<>")
; (match_operand:DF 1 "general_operand" "rf,m,rofF<>"))]
""
"!TARGET_5200"
"*
{
if (which_alternative == 7)
......@@ -1206,8 +1129,13 @@
return \"fmove%.d %f1,%0\";
}
return output_move_double (operands);
}
")
}")
(define_insn ""
[(set (match_operand:DF 0 "general_operand" "=r,g")
(match_operand:DF 1 "general_operand" "g,r"))]
"TARGET_5200"
"* return output_move_double (operands);")
(define_expand "movxf"
[(set (match_operand:XF 0 "nonimmediate_operand" "")
......@@ -1302,8 +1230,15 @@
}
")
(define_expand "movdi"
;; Let's see if it really still needs to handle fp regs, and, if so, why.
[(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "general_operand" ""))]
""
"")
;; movdi can apply to fp regs in some cases
(define_insn "movdi"
(define_insn ""
;; Let's see if it really still needs to handle fp regs, and, if so, why.
[(set (match_operand:DI 0 "general_operand" "=rm,r,&ro<>,y,rm,!*x,!rm")
(match_operand:DI 1 "general_operand" "rF,m,roi<>F,rmiF,y,rmF,*x"))]
......@@ -1311,7 +1246,7 @@
; (match_operand:DI 1 "general_operand" "r,m,roi<>,fF,rfmF,rmi,y,rm,x"))]
; [(set (match_operand:DI 0 "general_operand" "=rm,&rf,&ro<>,!&rm,!&f")
; (match_operand:DI 1 "general_operand" "r,m,roi<>,fF,rfF"))]
""
"!TARGET_5200"
"*
{
if (which_alternative == 8)
......@@ -1346,8 +1281,13 @@
return \"fmove%.d %f1,%0\";
}
return output_move_double (operands);
}
")
}")
(define_insn ""
[(set (match_operand:DI 0 "general_operand" "=r,g")
(match_operand:DI 1 "general_operand" "g,r"))]
"TARGET_5200"
"* return output_move_double (operands);")
;; Thus goes after the move instructions
;; because the move instructions are better (require no spilling)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment