Commit 125fe9ab by Jakub Jelinek Committed by Jakub Jelinek

re PR debug/86194 (ICE: SIGSEGV in avoid_constant_pool_reference…

re PR debug/86194 (ICE: SIGSEGV in avoid_constant_pool_reference (simplify-rtx.c:215) with -O -g -mavx512bw)

	PR debug/86194
	* var-tracking.c (use_narrower_mode_test): Check if shift amount can
	be narrowed.

	* gcc.target/i386/pr86194.c: New test.

From-SVN: r261807
parent c81a5aec
2018-06-20 Jakub Jelinek <jakub@redhat.com> 2018-06-20 Jakub Jelinek <jakub@redhat.com>
PR debug/86194
* var-tracking.c (use_narrower_mode_test): Check if shift amount can
be narrowed.
PR tree-optimization/86231 PR tree-optimization/86231
* tree-vrp.c (union_ranges): For ( [ ) ] or ( )[ ] range and * tree-vrp.c (union_ranges): For ( [ ) ] or ( )[ ] range and
anti-range don't overwrite *vr0min before using it to compute *vr0max. anti-range don't overwrite *vr0min before using it to compute *vr0max.
......
2018-06-20 Jakub Jelinek <jakub@redhat.com> 2018-06-20 Jakub Jelinek <jakub@redhat.com>
PR debug/86194
* gcc.target/i386/pr86194.c: New test.
PR tree-optimization/86231 PR tree-optimization/86231
* gcc.dg/tree-ssa/vrp119.c: New test. * gcc.dg/tree-ssa/vrp119.c: New test.
* gcc.c-torture/execute/pr86231.c: New test. * gcc.c-torture/execute/pr86231.c: New test.
......
/* PR debug/86194 */
/* { dg-do compile { target int128 } } */
/* { dg-options "-O -g -mavx512bw" } */
typedef unsigned U __attribute__ ((vector_size (64)));
typedef unsigned long V __attribute__ ((vector_size (64)));
typedef unsigned __int128 W __attribute__ ((vector_size (64)));
U u;
W
bar (W w)
{
U k = u;
w <<= (W)(U) { 5, 3, 3, 0, 7, 3, 1, 3, k[7] };
k += (U) { -(char)w[3] } != k;
return (W)k + w;
}
void
foo (void)
{
u = (U){ bar ((W)(V) { 0, ~0, 0, 0, 0, 0, ~0 })[0] };
}
...@@ -964,6 +964,24 @@ use_narrower_mode_test (rtx x, const_rtx subreg) ...@@ -964,6 +964,24 @@ use_narrower_mode_test (rtx x, const_rtx subreg)
case MULT: case MULT:
break; break;
case ASHIFT: case ASHIFT:
if (GET_MODE (XEXP (x, 1)) != VOIDmode)
{
enum machine_mode mode = GET_MODE (subreg);
rtx op1 = XEXP (x, 1);
enum machine_mode op1_mode = GET_MODE (op1);
if (GET_MODE_PRECISION (as_a <scalar_int_mode> (mode))
< GET_MODE_PRECISION (as_a <scalar_int_mode> (op1_mode)))
{
poly_uint64 byte = subreg_lowpart_offset (mode, op1_mode);
if (GET_CODE (op1) == SUBREG || GET_CODE (op1) == CONCAT)
{
if (!simplify_subreg (mode, op1, op1_mode, byte))
return false;
}
else if (!validate_subreg (mode, op1_mode, op1, byte))
return false;
}
}
iter.substitute (XEXP (x, 0)); iter.substitute (XEXP (x, 0));
break; break;
default: default:
......
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