PR target/80969 - Fix ICE with -mabi=ms -mavx512f, reduce wasted space when realigning stack.

2017-08-23  Daniel Santos  <daniel.santos@pobox.com>

	* config/i386/i386.h (ix86_frame::stack_realign_allocate_offset):
	Remove field.
	(ix86_frame::stack_realign_allocate): New field.
	(struct machine_frame_state): Modify comments.
	(machine_frame_state::sp_realigned_fp_end): New field.
	* config/i386/i386.c (ix86_compute_frame_layout): Rework stack frame
	layout calculation.
	(sp_valid_at): Add assertion to assure no attempt to access invalid
	offset of a realigned stack.
	(fp_valid_at): Likewise.
	(choose_baseaddr): Modify comments.
	(ix86_emit_outlined_ms2sysv_save): Adjust to changes in
	ix86_expand_prologue.
	(ix86_expand_prologue): Modify stack realignment and allocation.
	(ix86_expand_epilogue): Modify comments.
	* doc/sourcebuild.texi: Add documentation for target selectors avx2,
	avx2_runtime, avx512f, and avx512f_runtime.

2017-08-23  Daniel Santos  <daniel.santos@pobox.com>

	* gcc.target/i386/pr80969-1.c: New testcase.
	* gcc.target/i386/pr80969-2a.c: Likewise.
	* gcc.target/i386/pr80969-2.c: Likewise.
	* gcc.target/i386/pr80969-3.c: Likewise.
	* gcc.target/i386/pr80969-4a.c: Likewise.
	* gcc.target/i386/pr80969-4b.c: Likewise.
	* gcc.target/i386/pr80969-4.c: Likewise.
	* gcc.target/i386/pr80969-4.h: New header common to pr80969-4*.c
	* lib/target-supports.exp (check_avx512_os_support_available,
	check_avx512f_hw_available, check_effective_target_avx512f_runtime):
	New proceedures for target avx512f and avx512f_runtime selectors.
	(check_avx2_hw_available): Fix breakage due NULL being undefined.

From-SVN: r251321

gcc/ChangeLog

+2017-08-23  Daniel Santos  <daniel.santos@pobox.com>
+
+	* config/i386/i386.h (ix86_frame::stack_realign_allocate_offset):
+	Remove field.
+	(ix86_frame::stack_realign_allocate): New field.
+	(struct machine_frame_state): Modify comments.
+	(machine_frame_state::sp_realigned_fp_end): New field.
+	* config/i386/i386.c (ix86_compute_frame_layout): Rework stack frame
+	layout calculation.
+	(sp_valid_at): Add assertion to assure no attempt to access invalid
+	offset of a realigned stack.
+	(fp_valid_at): Likewise.
+	(choose_baseaddr): Modify comments.
+	(ix86_emit_outlined_ms2sysv_save): Adjust to changes in
+	ix86_expand_prologue.
+	(ix86_expand_prologue): Modify stack realignment and allocation.
+	(ix86_expand_epilogue): Modify comments.
+	* doc/sourcebuild.texi: Add documentation for target selectors avx2,
+	avx2_runtime, avx512f, and avx512f_runtime.
+
 2017-08-23  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.opt: Remove unneeded Init(0) initializations.

gcc/config/i386/i386.h

@@ -2503,7 +2503,7 @@ struct GTY(()) ix86_frame
   HOST_WIDE_INT stack_pointer_offset;
   HOST_WIDE_INT hfp_save_offset;
   HOST_WIDE_INT reg_save_offset;
-  HOST_WIDE_INT stack_realign_allocate_offset;
+  HOST_WIDE_INT stack_realign_allocate;
   HOST_WIDE_INT stack_realign_offset;
   HOST_WIDE_INT sse_reg_save_offset;
 
@@ -2512,7 +2512,9 @@ struct GTY(()) ix86_frame
   bool save_regs_using_mov;
 };
 
-/* Machine specific frame tracking during prologue/epilogue generation.  */
+/* Machine specific frame tracking during prologue/epilogue generation.  All
+   values are positive, but since the x86 stack grows downward, are subtratced
+   from the CFA to produce a valid address.  */
 
 struct GTY(()) machine_frame_state
 {
@@ -2550,13 +2552,19 @@ struct GTY(()) machine_frame_state
 
   /* Indicates whether the stack pointer has been re-aligned.  When set,
      SP/FP continue to be relative to the CFA, but the stack pointer
-     should only be used for offsets >= sp_realigned_offset, while
-     the frame pointer should be used for offsets < sp_realigned_offset.
+     should only be used for offsets > sp_realigned_offset, while
+     the frame pointer should be used for offsets <= sp_realigned_fp_last.
      The flags realigned and sp_realigned are mutually exclusive.  */
   BOOL_BITFIELD sp_realigned : 1;
 
-  /* If sp_realigned is set, this is the offset from the CFA that the
-     stack pointer was realigned to.  */
+  /* If sp_realigned is set, this is the last valid offset from the CFA
+     that can be used for access with the frame pointer.  */
+  HOST_WIDE_INT sp_realigned_fp_last;
+
+  /* If sp_realigned is set, this is the offset from the CFA that the stack
+     pointer was realigned, and may or may not be equal to sp_realigned_fp_last.
+     Access via the stack pointer is only valid for offsets that are greater than
+     this value.  */
   HOST_WIDE_INT sp_realigned_offset;
 };
 

gcc/doc/sourcebuild.texi

@@ -1855,6 +1855,18 @@ Target supports compiling @code{avx} instructions.
 @item avx_runtime
 Target supports the execution of @code{avx} instructions.
 
+@item avx2
+Target supports compiling @code{avx2} instructions.
+
+@item avx2_runtime
+Target supports the execution of @code{avx2} instructions.
+
+@item avx512f
+Target supports compiling @code{avx512f} instructions.
+
+@item avx512f_runtime
+Target supports the execution of @code{avx512f} instructions.
+
 @item cell_hw
 Test system can execute AltiVec and Cell PPU instructions.
 

gcc/testsuite/ChangeLog

+2017-08-23  Daniel Santos  <daniel.santos@pobox.com>
+
+	* gcc.target/i386/pr80969-1.c: New testcase.
+	* gcc.target/i386/pr80969-2a.c: Likewise.
+	* gcc.target/i386/pr80969-2.c: Likewise.
+	* gcc.target/i386/pr80969-3.c: Likewise.
+	* gcc.target/i386/pr80969-4a.c: Likewise.
+	* gcc.target/i386/pr80969-4b.c: Likewise.
+	* gcc.target/i386/pr80969-4.c: Likewise.
+	* gcc.target/i386/pr80969-4.h: New header common to pr80969-4*.c
+	* lib/target-supports.exp (check_avx512_os_support_available,
+	check_avx512f_hw_available, check_effective_target_avx512f_runtime):
+	New proceedures for target avx512f and avx512f_runtime selectors.
+	(check_avx2_hw_available): Fix breakage due NULL being undefined.
+
 2017-08-23  David Malcolm  <dmalcolm@redhat.com>
 
 	* g++.dg/diagnostic/param-type-mismatch.C: New test acse.

gcc/testsuite/gcc.target/i386/pr80969-1.c

+/* { dg-do run { target { ! x32 } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+int a[56];
+int b;
+int main (int argc, char *argv[]) {
+  int c;
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+  return 0;
+}

gcc/testsuite/gcc.target/i386/pr80969-2.c

+/* { dg-do run { target { { ! x32 } && avx512f_runtime } } } */
+/* { dg-do compile { target { { ! x32 } && { ! avx512f_runtime } } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test when calling a sysv func.  */
+
+int a[56];
+int b;
+
+static void __attribute__((sysv_abi)) sysv ()
+{
+}
+
+void __attribute__((sysv_abi)) (*volatile const sysv_noinfo)() = sysv;
+
+int main (int argc, char *argv[]) {
+  int c;
+  sysv_noinfo ();
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+  return 0;
+}

gcc/testsuite/gcc.target/i386/pr80969-2a.c

+/* { dg-do run { target { lp64 && avx512f_runtime } } } */
+/* { dg-do compile { target { lp64 && { ! avx512f_runtime } } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f -mcall-ms2sysv-xlogues" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test when calling a sysv func using save/restore stubs.  */
+
+#include "pr80969-2.c"

gcc/testsuite/gcc.target/i386/pr80969-3.c

+/* { dg-do run { target { { ! x32 } && avx512f_runtime } } } */
+/* { dg-do compile { target { { ! x32 } && { ! avx512f_runtime } } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with alloca (and DRAP).  */
+
+#include <alloca.h>
+
+int a[56];
+volatile int b = -12345;
+volatile const int d = 42;
+
+void foo (int *x, int y, int z)
+{
+}
+
+void (*volatile const foo_noinfo)(int *, int, int) = foo;
+
+int main (int argc, char *argv[]) {
+  int c;
+  int *e = alloca (d);
+  foo_noinfo (e, d, 0);
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    foo_noinfo (e, d, c);
+    a[-(b % 56)] = c;
+  }
+  return 0;
+}

gcc/testsuite/gcc.target/i386/pr80969-4.c

+/* { dg-do run { target { { ! x32 } && avx512f_runtime } } } */
+/* { dg-do compile { target { { ! x32 } && { ! avx512f_runtime } } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with avx512 and va_args.  */
+
+#define CALLEE_ABI ms_abi
+#include "pr80969-4.h"

gcc/testsuite/gcc.target/i386/pr80969-4.h

+
+#include <stdarg.h>
+#include <assert.h>
+
+#include "avx-check.h"
+
+int a[56];
+int b;
+
+__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 };
+__m512d n2 = { -93.83, 893.318, 3994.3, -39484.0, 830.32, -328.32, 3.14159, 2.99792 };
+__m128i n3 = { 893, -3180 } ;
+int n4 = 324;
+double n5 = 103.3;
+__m128i n6 = { -123, 2 };
+__m128d n7 = { -91.387, -8193.518 };
+__m256d n8 = { -123.3, 2.3, 3.4, -10.03 };
+__m128 n9 = { -123.3, 2.3, 3.4, -10.03 };
+__m128i n10 = { 1233, -100 };
+int n11 = 407;
+double n12 = 304.9;
+__m128i n13 = { 233, -110 };
+__m256i n14 = { -1233, 23, 34, -1003 };
+__m512i n15 = { -393, -180, 213.4, 1119.03, -8193.518, -100, 304.9, 2.99792 };
+__m128d n16 = { 73.0, 63.18 };
+__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 };
+__m128 n18 = { -183.3, 22.3, 13.4, -19.03 };
+
+__m128 e1;
+__m512d e2;
+__m128i e3;
+int e4;
+double e5;
+__m128i e6;
+__m128d e7;
+__m256d e8;
+__m128 e9;
+__m128i e10;
+int e11;
+double e12;
+__m128i e13;
+__m256i e14;
+__m512i e15;
+__m128d e16;
+__m256 e17;
+__m128 e18;
+
+static void
+__attribute__((noinline, CALLEE_ABI))
+bar (__m128 a1, __m512d a2, __m128i a3, va_list va_arglist)
+{
+  e1 = a1;
+  e2 = a2;
+  e3 = a3;
+  e4 = va_arg (va_arglist, int);
+  e5 = va_arg (va_arglist, double);
+  e6 = va_arg (va_arglist, __m128i);
+  e7 = va_arg (va_arglist, __m128d);
+  e8 = va_arg (va_arglist, __m256d);
+  e9 = va_arg (va_arglist, __m128);
+  e10 = va_arg (va_arglist, __m128i);
+  e11 = va_arg (va_arglist, int);
+  e12 = va_arg (va_arglist, double);
+  e13 = va_arg (va_arglist, __m128i);
+  e14 = va_arg (va_arglist, __m256i);
+  e15 = va_arg (va_arglist, __m512i);
+  e16 = va_arg (va_arglist, __m128d);
+  e17 = va_arg (va_arglist, __m256);
+  e18 = va_arg (va_arglist, __m128);
+}
+
+void __attribute__((CALLEE_ABI))
+(*volatile const bar_noinfo) (__m128, __m512d, __m128i, va_list) = bar;
+
+static void
+__attribute__((noinline))
+foo (__m128 a1, __m512d a2, __m128i a3, ...)
+{
+  va_list va_arglist;
+  int c;
+
+  va_start (va_arglist, a3);
+  bar_noinfo (a1, a2, a3, va_arglist);
+  va_end (va_arglist);
+
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+}
+void (*volatile const foo_noinfo) (__m128, __m512d, __m128i, ...) = foo;
+
+static void
+avx_test (void)
+{
+  foo (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12,
+       n13, n14, n15, n16, n17, n18);
+  assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0);
+  assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0);
+  assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0);
+  assert (n4 == e4);
+  assert (n5 == e5);
+  assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0);
+  assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0);
+  assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0);
+  assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0);
+  assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0);
+  assert (n11 == e11);
+  assert (n12 == e12);
+  assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0);
+  assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0);
+  assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0);
+  assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0);
+  assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0);
+  assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0);
+}
+

gcc/testsuite/gcc.target/i386/pr80969-4a.c

+/* { dg-do run { target { { ! x32 } && avx512f_runtime } } } */
+/* { dg-do compile { target { { ! x32 } && { ! avx512f_runtime } } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with avx512, va_args, and ms to sysv call.  */
+
+#define CALLEE_ABI sysv_abi
+#include "pr80969-4.h"

gcc/testsuite/gcc.target/i386/pr80969-4b.c

+/* { dg-do run { target { lp64 && avx512f_runtime } } } */
+/* { dg-do compile { target { lp64 && { ! avx512f_runtime } } } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f -mcall-ms2sysv-xlogues" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with avx512, va_args, and ms to sysv call using save/restore stubs.  */
+
+#define CALLEE_ABI sysv_abi
+#include "pr80969-4.h"

gcc/testsuite/lib/target-supports.exp

@@ -1642,6 +1642,29 @@ proc check_avx_os_support_available { } {
     }]
 }
 
+# Return 1 if the target OS supports running AVX executables, 0
+# otherwise.  Cache the result.
+
+proc check_avx512_os_support_available { } {
+    return [check_cached_effective_target avx512_os_support_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+	    expr 0
+	} else {
+	    # Check that OS has AVX512, AVX and SSE saving enabled.
+	    check_runtime_nocache avx512_os_support_available {
+		int main ()
+		{
+		  unsigned int eax, edx;
+
+		  asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
+		  return (eax & 0xe6) != 0xe6;
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports executing SSE instructions, 0
 # otherwise.  Cache the result.
 
@@ -1822,6 +1845,7 @@ proc check_avx2_hw_available { } {
 	    expr 0
 	} else {
 	    check_runtime_nocache avx2_hw_available {
+		#include <stddef.h>
 		#include "cpuid.h"
 		int main ()
 		{
@@ -1842,6 +1866,37 @@ proc check_avx2_hw_available { } {
     }]
 }
 
+# Return 1 if the target supports executing AVX512 foundation instructions, 0
+# otherwise.  Cache the result.
+
+proc check_avx512f_hw_available { } {
+    return [check_cached_effective_target avx512f_hw_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} else {
+	    check_runtime_nocache avx512f_hw_available {
+		#include <stddef.h>
+		#include "cpuid.h"
+		int main ()
+		{
+		  unsigned int eax, ebx, ecx, edx;
+		  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)
+		      || !(ecx & bit_OSXSAVE))
+		    return 1;
+
+		  if (__get_cpuid_max (0, NULL) < 7)
+		    return 1;
+
+		  __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+		  return !(ebx & bit_AVX512F);
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports running SSE executables, 0 otherwise.
 
 proc check_effective_target_sse_runtime { } {
@@ -1928,6 +1983,17 @@ proc check_effective_target_avx2_runtime { } {
     return 0
 }
 
+# Return 1 if the target supports running AVX512f executables, 0 otherwise.
+
+proc check_effective_target_avx512f_runtime { } {
+    if { [check_effective_target_avx512f]
+	 && [check_avx512f_hw_available]
+	 && [check_avx512_os_support_available] } {
+	return 1
+    }
+    return 0
+}
+
 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
 # move instructions for moves from GPR to FPR.