Commit 10e9fecc by Jan Hubicka Committed by Jan Hubicka

i386.md (subsi_3_zext, [...]): Fix predicates.


	* i386.md (subsi_3_zext, sse2_nandv2di3): Fix predicates.
	* i386.c (k8_avoid_jump_misspredicts): Fix debug output.

	* cfg.c (verify_flow_info): Move IL independent checks from cfgrtl here.
	(dump_bb): New based on old dump_bb in cfgrtl.c
	(debug_bb, debug_bb_n): Move the functions from cfgrtl.c here.
	* cfghooks.h (cfgh_verify_flow_info): Return status.
	* cfglayout.c (cfg_layout_finalize): Verify CFG correctness.
	* cfgrtl.c (debug_bb, debug_bb_n): Move to cfg.c
	(dump_bb): Remove generic parts.
	(rtl_verify_flow_info_1): Break out from rtl_verify_flow_info.
	(rtl_verify_flow_info): Only check things dependeing on linearized RTL.

	* i386-cmov1.c: Fix regular expression.
	* i386-cvt-1.c: Likewise.
	* i386-local.c: Likewise.
	* i386-local2.c: Likewise.
	* i386-mul.c: Likewise.
	* i386-ssetype-1.c: Likewise.
	* i386-ssetype-3.c: Likewise.
	* i386-ssetype-5.c: Likewise.

From-SVN: r67630
parent 2cdfea3a
Sun Jun 8 15:52:17 CEST 2003 Jan Hubicka <jh@suse.cz>
* i386.md (subsi_3_zext, sse2_nandv2di3): Fix predicates.
* i386.c (k8_avoid_jump_misspredicts): Fix debug output.
* cfg.c (verify_flow_info): Move IL independent checks from cfgrtl here.
(dump_bb): New based on old dump_bb in cfgrtl.c
(debug_bb, debug_bb_n): Move the functions from cfgrtl.c here.
* cfghooks.h (cfgh_verify_flow_info): Return status.
* cfglayout.c (cfg_layout_finalize): Verify CFG correctness.
* cfgrtl.c (debug_bb, debug_bb_n): Move to cfg.c
(dump_bb): Remove generic parts.
(rtl_verify_flow_info_1): Break out from rtl_verify_flow_info.
(rtl_verify_flow_info): Only check things dependeing on linearized RTL.
2003-06-08 Neil Booth <neil@daikokuya.co.uk>
* Makefile.in: Rename options.c and options.h to c-options.c and
......
......@@ -39,6 +39,10 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- Allocation of AUX fields for basic blocks
alloc_aux_for_blocks, free_aux_for_blocks, alloc_aux_for_block
- clear_bb_flags
- Consistency checking
verify_flow_info
- Dumping and debugging
print_rtl_with_bb, dump_bb, debug_bb, debug_bb_n
*/
#include "config.h"
......@@ -832,9 +836,185 @@ free_aux_for_edges ()
}
/* Verify the CFG consistency.
??? In the future move IL idepdendent checks here. */
Currently it does following checks edge and basic block list correctness
and calls into IL dependent checking then. */
void
verify_flow_info ()
{
cfg_hooks->cfgh_verify_flow_info ();
size_t *edge_checksum;
int num_bb_notes, err = 0;
basic_block bb, last_bb_seen;
basic_block *last_visited;
last_visited = (basic_block *) xcalloc (last_basic_block + 2,
sizeof (basic_block));
edge_checksum = (size_t *) xcalloc (last_basic_block + 2, sizeof (size_t));
/* Check bb chain & numbers. */
last_bb_seen = ENTRY_BLOCK_PTR;
FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb, NULL, next_bb)
{
if (bb != EXIT_BLOCK_PTR
&& bb != BASIC_BLOCK (bb->index))
{
error ("bb %d on wrong place", bb->index);
err = 1;
}
if (bb->prev_bb != last_bb_seen)
{
error ("prev_bb of %d should be %d, not %d",
bb->index, last_bb_seen->index, bb->prev_bb->index);
err = 1;
}
last_bb_seen = bb;
}
/* Now check the basic blocks (boundaries etc.) */
FOR_EACH_BB_REVERSE (bb)
{
int n_fallthru = 0;
edge e;
if (bb->count < 0)
{
error ("verify_flow_info: Wrong count of block %i %i",
bb->index, (int)bb->count);
err = 1;
}
if (bb->frequency < 0)
{
error ("verify_flow_info: Wrong frequency of block %i %i",
bb->index, bb->frequency);
err = 1;
}
for (e = bb->succ; e; e = e->succ_next)
{
if (last_visited [e->dest->index + 2] == bb)
{
error ("verify_flow_info: Duplicate edge %i->%i",
e->src->index, e->dest->index);
err = 1;
}
if (e->probability < 0 || e->probability > REG_BR_PROB_BASE)
{
error ("verify_flow_info: Wrong probability of edge %i->%i %i",
e->src->index, e->dest->index, e->probability);
err = 1;
}
if (e->count < 0)
{
error ("verify_flow_info: Wrong count of edge %i->%i %i",
e->src->index, e->dest->index, (int)e->count);
err = 1;
}
last_visited [e->dest->index + 2] = bb;
if (e->flags & EDGE_FALLTHRU)
n_fallthru++;
if (e->src != bb)
{
error ("verify_flow_info: Basic block %d succ edge is corrupted",
bb->index);
fprintf (stderr, "Predecessor: ");
dump_edge_info (stderr, e, 0);
fprintf (stderr, "\nSuccessor: ");
dump_edge_info (stderr, e, 1);
fprintf (stderr, "\n");
err = 1;
}
edge_checksum[e->dest->index + 2] += (size_t) e;
}
if (n_fallthru > 1)
{
error ("Wrong amount of branch edges after unconditional jump %i", bb->index);
err = 1;
}
for (e = bb->pred; e; e = e->pred_next)
{
if (e->dest != bb)
{
error ("basic block %d pred edge is corrupted", bb->index);
fputs ("Predecessor: ", stderr);
dump_edge_info (stderr, e, 0);
fputs ("\nSuccessor: ", stderr);
dump_edge_info (stderr, e, 1);
fputc ('\n', stderr);
err = 1;
}
edge_checksum[e->dest->index + 2] -= (size_t) e;
}
}
/* Complete edge checksumming for ENTRY and EXIT. */
{
edge e;
for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
edge_checksum[e->dest->index + 2] += (size_t) e;
for (e = EXIT_BLOCK_PTR->pred; e ; e = e->pred_next)
edge_checksum[e->dest->index + 2] -= (size_t) e;
}
FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb)
if (edge_checksum[bb->index + 2])
{
error ("basic block %i edge lists are corrupted", bb->index);
err = 1;
}
num_bb_notes = 0;
last_bb_seen = ENTRY_BLOCK_PTR;
/* Clean up. */
free (last_visited);
free (edge_checksum);
err |= cfg_hooks->cfgh_verify_flow_info ();
if (err)
internal_error ("verify_flow_info failed");
}
/* Print out one basic block with live information at start and end. */
void
dump_bb (bb, outf)
basic_block bb;
FILE *outf;
{
edge e;
fprintf (outf, ";; Basic block %d, loop depth %d, count ",
bb->index, bb->loop_depth);
fprintf (outf, HOST_WIDEST_INT_PRINT_DEC, (HOST_WIDEST_INT) bb->count);
putc ('\n', outf);
cfg_hooks->dump_bb (bb, outf);
fputs (";; Successors: ", outf);
for (e = bb->succ; e; e = e->succ_next)
dump_edge_info (outf, e, 1);
putc ('\n', outf);
}
void
debug_bb (bb)
basic_block bb;
{
dump_bb (bb, stderr);
}
basic_block
debug_bb_n (n)
int n;
{
basic_block bb = BASIC_BLOCK (n);
dump_bb (bb, stderr);
return bb;
}
......@@ -26,7 +26,8 @@ struct cfg_hooks
{
/* Debugging. Do not use macros to hook these so they can be called from
debugger! */
void (*cfgh_verify_flow_info) PARAMS ((void));
int (*cfgh_verify_flow_info) PARAMS ((void));
void (*dump_bb) PARAMS ((basic_block, FILE *));
/* Basic CFG manipulation. */
......
......@@ -1032,6 +1032,9 @@ break_superblocks ()
void
cfg_layout_finalize ()
{
#ifdef ENABLE_CHECKING
verify_flow_info ();
#endif
rtl_register_cfg_hooks ();
fixup_fallthru_exit_predecessor ();
fixup_reorder_chain ();
......
......@@ -15685,7 +15685,7 @@ k8_avoid_jump_misspredicts ()
if (njumps < 0)
abort ();
if (rtl_dump_file)
fprintf(stderr,"Interval %i to %i has %i bytes\n",
fprintf(rtl_dump_file, "Interval %i to %i has %i bytes\n",
INSN_UID (start), INSN_UID (insn), nbytes);
if (njumps == 3 && isjump && nbytes < 16)
......@@ -15750,8 +15750,7 @@ ix86_reorg ()
delete_insn (ret);
}
}
if (TARGET_K8)
k8_avoid_jump_misspredicts ();
k8_avoid_jump_misspredicts ();
}
/* Return nonzero when QImode register that must be represented via REX prefix
......
......@@ -97,8 +97,12 @@ extern int target_flags;
/* configure can arrange to make this 2, to force a 486. */
#ifndef TARGET_CPU_DEFAULT
#ifdef TARGET_64BIT_DEFAULT
#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8
#else
#define TARGET_CPU_DEFAULT 0
#endif
#endif
/* Masks for the -m switches */
#define MASK_80387 0x00000001 /* Hardware floating point */
......
......@@ -7055,7 +7055,7 @@
(define_insn "*subsi_3_zext"
[(set (reg 17)
(compare (match_operand:SI 1 "nonimmediate_operand" "0")
(compare (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "general_operand" "rim")))
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
......@@ -20151,7 +20151,7 @@
(define_insn "sse2_nandv2di3"
[(set (match_operand:V2DI 0 "register_operand" "=x")
(and:V2DI (not:V2DI (match_operand:V2DI 1 "nonimmediate_operand" "0"))
(and:V2DI (not:V2DI (match_operand:V2DI 1 "register_operand" "0"))
(match_operand:V2DI 2 "nonimmediate_operand" "xm")))]
"TARGET_SSE2
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
......
Sun Jun 8 16:46:04 CEST 2003 Jan Hubicka <jh@suse.cz>
* i386-cmov1.c: Fix regular expression.
* i386-cvt-1.c: Likewise.
* i386-local.c: Likewise.
* i386-local2.c: Likewise.
* i386-mul.c: Likewise.
* i386-ssetype-1.c: Likewise.
* i386-ssetype-3.c: Likewise.
* i386-ssetype-5.c: Likewise.
2003-06-08 Kriang Lerdsuwanakij <lerdsuwa@users.sourceforge.net>
PR c++/11039
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -march=k8" } */
/* { dg-final { scan-assembler "sar.*magic_namea" } } */
/* { dg-final { scan-assembler "sar.*magic_nameb" } } */
/* { dg-final { scan-assembler "sar.*magic_namec" } } */
/* { dg-final { scan-assembler "shr.*magic_named" } } */
/* { dg-final { scan-assembler "shr.*magic_namee" } } */
/* { dg-final { scan-assembler "shr.*magic_namef" } } */
/* { dg-final { scan-assembler "sar\[^\\n\]*magic_namea" } } */
/* { dg-final { scan-assembler "sar\[^\\n\]*magic_nameb" } } */
/* { dg-final { scan-assembler "sar\[^\\n\]*magic_namec" } } */
/* { dg-final { scan-assembler "shr\[^\\n\]*magic_named" } } */
/* { dg-final { scan-assembler "shr\[^\\n\]*magic_namee" } } */
/* { dg-final { scan-assembler "shr\[^\\n\]*magic_namef" } } */
/* Check code generation for several conditional moves doable by single arithmetics. */
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -march=k8 -mfpmath=sse" } */
/* { dg-final { scan-assembler "cvttsd2si.*xmm" } } */
/* { dg-final { scan-assembler "cvttss2si.*xmm" } } */
/* { dg-final { scan-assembler "cvttsd2si\[^\\n\]*xmm" } } */
/* { dg-final { scan-assembler "cvttss2si\[^\\n\]*xmm" } } */
int a,a1;
double b;
float b1;
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -funit-at-a-time" } */
/* { dg-final { scan-assembler "magic.*eax" } } */
/* { dg-final { scan-assembler "magic\[^\\n\]*eax" } } */
/* Verify that local calling convention is used. */
static t(int) __attribute__ ((noinline));
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -funit-at-a-time -fomit-frame-pointer" } */
/* { dg-final { scan-assembler-not "sub.*sp" } } */
/* { dg-final { scan-assembler-not "sub\[^\\n\]*sp" } } */
static __attribute__ ((noinline)) q ();
int a;
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -march=k8" } */
/* { dg-final { scan-assembler "and.*magic" } } */
/* { dg-final { scan-assembler "and\[^\\n\]*magic" } } */
/* Should be done as "andw $32767, magic". */
unsigned short magic;
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -msse2 -march=k8" } */
/* { dg-final { scan-assembler "andpd.*magic" } } */
/* { dg-final { scan-assembler "andnpd.*magic" } } */
/* { dg-final { scan-assembler "xorpd.*magic" } } */
/* { dg-final { scan-assembler "orpd.*magic" } } */
/* { dg-final { scan-assembler "andpd\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "andnpd\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "xorpd\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "orpd\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler-not "movdqa" } } */
/* { dg-final { scan-assembler "movapd.*magic" } } */
/* { dg-final { scan-assembler "movapd\[^\\n\]*magic" } } */
/* Verify that we generate proper instruction with memory operand. */
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -msse2 -march=k8" } */
/* { dg-final { scan-assembler "andps.*magic" } } */
/* { dg-final { scan-assembler "andnps.*magic" } } */
/* { dg-final { scan-assembler "xorps.*magic" } } */
/* { dg-final { scan-assembler "orps.*magic" } } */
/* { dg-final { scan-assembler "andps\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "andnps\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "xorps\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "orps\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler-not "movdqa" } } */
/* { dg-final { scan-assembler "movaps.*magic" } } */
/* { dg-final { scan-assembler "movaps\[^\\n\]*magic" } } */
/* Verify that we generate proper instruction with memory operand. */
......
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O2 -msse2 -march=k8" } */
/* { dg-final { scan-assembler "pand.*magic" } } */
/* { dg-final { scan-assembler "pandn.*magic" } } */
/* { dg-final { scan-assembler "pxor.*magic" } } */
/* { dg-final { scan-assembler "por.*magic" } } */
/* { dg-final { scan-assembler "pand\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "pandn\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "pxor\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "por\[^\\n\]*magic" } } */
/* { dg-final { scan-assembler "movdqa" } } */
/* { dg-final { scan-assembler-not "movaps.*magic" } } */
/* { dg-final { scan-assembler-not "movaps\[^\\n\]*magic" } } */
/* Verify that we generate proper instruction with memory operand. */
......
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