i386.md (*movsf_internal, [...]): Return 256-bit AVX modes for TARGET_PREFER_AVX256.

gcc/
        * config/i386/i386.md (*movsf_internal, *movdf_internal):
        Return 256-bit AVX modes for TARGET_PREFER_AVX256.

gcc/testsuite/
        * gcc.target/i386/avx512f-constant-float-return.c: New test.

From-SVN: r253259

gcc/ChangeLog

+2017-09-28  Sergey Shalnov  <Sergey.Shalnov@intel.com>
+
+	* config/i386/i386.md (*movsf_internal, *movdf_internal):
+	Return 256-bit AVX modes for TARGET_PREFER_AVX256.
+
 2017-09-28  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	* config/arm/arm.c (arm_option_override): Forbid ARMv8-M Security
@@ -785,7 +790,7 @@
 
 2017-09-21  Martin Sebor  <msebor@redhat.com>
 
-	* PR c/81882
+	PR c/81882
 	* doc/extend.texi (attribute ifunc): Avoid relying on ill-formed
 	code (in C++) or code that triggers warnings.
 

gcc/config/i386/i386.md

@@ -3524,7 +3524,8 @@
 	       (eq_attr "alternative" "12,16")
 		 (cond [(not (match_test "TARGET_SSE2"))
 		 	  (const_string "V4SF")
-			(match_test "TARGET_AVX512F")
+			(and (match_test "TARGET_AVX512F")
+			  (not (match_test "TARGET_PREFER_AVX256")))
 			  (const_string "XI")
 			(match_test "TARGET_AVX")
 			  (const_string "V2DF")
@@ -3693,7 +3694,8 @@
 	       (eq_attr "alternative" "5")
 		 (cond [(not (match_test "TARGET_SSE2"))
  		 	  (const_string "V4SF")
-			(match_test "TARGET_AVX512F")
+			(and (match_test "TARGET_AVX512F")
+			  (not (match_test "TARGET_PREFER_AVX256")))
 			  (const_string "V16SF")
 			(match_test "TARGET_AVX")
 			  (const_string "V4SF")

gcc/testsuite/ChangeLog

+2017-09-28  Sergey Shalnov  <Sergey.Shalnov@intel.com>
+
+	* gcc.target/i386/avx512f-constant-float-return.c: New test.
+
 2017-09-28  Christophe Lyon  <christophe.lyon@linaro.org>
 
 	* gcc.target/arm/aapcs/align4.c: Require arm_neon_hw effective target.

gcc/testsuite/gcc.target/i386/avx512f-constant-float-return.c

+/* { dg-do compile } */
+/* { dg-options "-O3 -march=skylake-avx512 -mprefer-avx256" } */
+/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */
+
+float
+my_test_f()
+{
+  return 0.0f;
+}
+
+double
+my_test_d()
+{
+  return 0.0;
+}