Commit 10ae7c7b by Daniel Jacobowitz Committed by Daniel Jacobowitz

arm.c (arm_cannot_copy_insn_p): Do not expect a PARALLEL.

	* config/arm/arm.c (arm_cannot_copy_insn_p): Do not expect a
	PARALLEL.
	* config/arm/arm.md (pic_add_dot_plus_four, pic_add_dot_plus_eight)
	(tls_load_dot_plus_eight): Move the label number into the unspec.
	* config/arm/thumb2.md (pic_load_dot_plus_four): Likewise.

	* gcc.dg/tls/opt-14.c: New.

From-SVN: r126178
parent af92ab36
2007-07-01 Daniel Jacobowitz <dan@codesourcery.com>
* config/arm/arm.c (arm_cannot_copy_insn_p): Do not expect a
PARALLEL.
* config/arm/arm.md (pic_add_dot_plus_four, pic_add_dot_plus_eight)
(tls_load_dot_plus_eight): Move the label number into the unspec.
* config/arm/thumb2.md (pic_load_dot_plus_four): Likewise.
2007-07-01 Andreas Schwab <schwab@suse.de> 2007-07-01 Andreas Schwab <schwab@suse.de>
* dwarf2out.c (initial_return_save): Define only if used. * dwarf2out.c (initial_return_save): Define only if used.
......
...@@ -6058,10 +6058,9 @@ arm_cannot_copy_insn_p (rtx insn) ...@@ -6058,10 +6058,9 @@ arm_cannot_copy_insn_p (rtx insn)
{ {
rtx pat = PATTERN (insn); rtx pat = PATTERN (insn);
if (GET_CODE (pat) == PARALLEL if (GET_CODE (pat) == SET)
&& GET_CODE (XVECEXP (pat, 0, 0)) == SET)
{ {
rtx rhs = SET_SRC (XVECEXP (pat, 0, 0)); rtx rhs = SET_SRC (pat);
if (GET_CODE (rhs) == UNSPEC if (GET_CODE (rhs) == UNSPEC
&& XINT (rhs, 1) == UNSPEC_PIC_BASE) && XINT (rhs, 1) == UNSPEC_PIC_BASE)
......
...@@ -4859,9 +4859,9 @@ ...@@ -4859,9 +4859,9 @@
(define_insn "pic_add_dot_plus_four" (define_insn "pic_add_dot_plus_four"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0") (unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0")
(const (plus:SI (pc) (const_int 4))))] (const (plus:SI (pc) (const_int 4))))
UNSPEC_PIC_BASE)) (match_operand 2 "" "")]
(use (match_operand 2 "" ""))] UNSPEC_PIC_BASE))]
"TARGET_THUMB1" "TARGET_THUMB1"
"* "*
(*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\", (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
...@@ -4874,9 +4874,9 @@ ...@@ -4874,9 +4874,9 @@
(define_insn "pic_add_dot_plus_eight" (define_insn "pic_add_dot_plus_eight"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "r") (unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "r")
(const (plus:SI (pc) (const_int 8))))] (const (plus:SI (pc) (const_int 8))))
UNSPEC_PIC_BASE)) (match_operand 2 "" "")]
(use (match_operand 2 "" ""))] UNSPEC_PIC_BASE))]
"TARGET_ARM" "TARGET_ARM"
"* "*
(*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\", (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
...@@ -4889,9 +4889,9 @@ ...@@ -4889,9 +4889,9 @@
(define_insn "tls_load_dot_plus_eight" (define_insn "tls_load_dot_plus_eight"
[(set (match_operand:SI 0 "register_operand" "+r") [(set (match_operand:SI 0 "register_operand" "+r")
(mem:SI (unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "r") (mem:SI (unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "r")
(const (plus:SI (pc) (const_int 8))))] (const (plus:SI (pc) (const_int 8))))
UNSPEC_PIC_BASE))) (match_operand 2 "" "")]
(use (match_operand 2 "" ""))] UNSPEC_PIC_BASE)))]
"TARGET_ARM" "TARGET_ARM"
"* "*
(*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\", (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
......
...@@ -259,9 +259,9 @@ ...@@ -259,9 +259,9 @@
;; word aligned. ;; word aligned.
(define_insn "pic_load_dot_plus_four" (define_insn "pic_load_dot_plus_four"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(const (plus:SI (pc) (const_int 4)))] (unspec:SI [(const (plus:SI (pc) (const_int 4)))
UNSPEC_PIC_BASE)) (use (match_operand 1 "" ""))]
(use (match_operand 1 "" ""))] UNSPEC_PIC_BASE))]
"TARGET_THUMB2" "TARGET_THUMB2"
"* "*
assemble_align(BITS_PER_WORD); assemble_align(BITS_PER_WORD);
......
2007-07-01 Daniel Jacobowitz <dan@codesourcery.com>
* gcc.dg/tls/opt-14.c: New.
2007-07-01 Ollie Wild <aaw@google.com> 2007-07-01 Ollie Wild <aaw@google.com>
* g++.dg/lookup/using16.C: New test. * g++.dg/lookup/using16.C: New test.
/* This testcase generated invalid assembly on ARM Thumb-2. Two
PIC additions of pc were combined, but the deleted label was still
used. */
/* { dg-do assemble } */
/* { dg-options "-O2" } */
/* { dg-require-effective-target tls } */
struct __res_state
{
int options;
};
extern __thread struct __res_state *__resp
__attribute__ ((tls_model ("initial-exec")));
void foo (void);
int main(void)
{
int count, total = 0;
for (count = 0; count < 10; count++)
{
if (((*__resp).options & 0x00000001) == 0)
foo ();
(*__resp).options &= ~((0x00000002 | 0x00000200 | 0x00000080));
}
return 0;
}
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