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lvzhengyang
riscv-gcc-1
Commits
101cb92a
Commit
101cb92a
authored
Mar 20, 2003
by
Kazu Hirata
Committed by
Kazu Hirata
Mar 20, 2003
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* config/h8300/h8300.md (a peephole2): New.
From-SVN: r64614
parent
54c99af1
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gcc/config/h8300/h8300.md
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gcc/ChangeLog
View file @
101cb92a
2003-03-20 Kazu Hirata <kazu@cs.umass.edu>
2003-03-20 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (a peephole2): New.
2003-03-20 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (*addsi3_and_r_1): New.
* config/h8300/h8300.md (*addsi3_and_r_1): New.
(*addsi3_and_not_r_1): Likewise.
(*addsi3_and_not_r_1): Likewise.
...
...
gcc/config/h8300/h8300.md
View file @
101cb92a
...
@@ -3755,6 +3755,26 @@
...
@@ -3755,6 +3755,26 @@
(define_peephole2
(define_peephole2
[
(set (match_operand:SI 0 "register_operand" "")
[
(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "general_operand" ""))
(set (match_dup 0)
(and:SI (match_dup 0)
(match_operand:SI 2 "const_int_qi_operand" "")))]
"(TARGET_H8300H || TARGET_H8300S)
&& !reg_overlap_mentioned_p (operands
[
0
]
, operands
[
1
]
)
&& !(GET_CODE (operands
[
1
]
) == MEM && MEM_VOLATILE_P (operands
[
1
]
))"
[
(set (match_dup 0)
(const_int 0))
(set (strict_low_part (match_dup 3))
(match_dup 4))
(set (match_dup 0)
(and:SI (match_dup 0)
(match_dup 5)))]
"operands
[
3
]
= gen_lowpart (QImode, operands
[
0
]
);
operands
[
4
]
= gen_lowpart (QImode, operands
[
1
]
);
operands
[
5
]
= GEN_INT (~0xff | INTVAL (operands
[
2
]
));")
(define_peephole2
[
(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "memory_operand" ""))
(match_operand:SI 1 "memory_operand" ""))
(set (match_dup 0)
(set (match_dup 0)
(and:SI (match_dup 0)
(and:SI (match_dup 0)
...
...
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