Commit 100c7420 by Ulrich Weigand Committed by Ulrich Weigand

s390.c (preferred_la_operand_p): New function.

	* config/s390/s390.c (preferred_la_operand_p): New function.
	* config/s390/s390-protos.h (preferred_la_operand_p): Declare it.
	* config/s390/s390.md ("addaddr_esame", "*la_ccclobber"): Replace by ...
	("*la_64_cc", "*la_31_cc", splitters): ... these.
	("*la_31"): Deactivate for TARGET_64BIT.
	("*la_31_and", "*la_31_and_cc"): New.

From-SVN: r57473
parent 9fc63af5
2002-09-24 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.c (preferred_la_operand_p): New function.
* config/s390/s390-protos.h (preferred_la_operand_p): Declare it.
* config/s390/s390.md ("addaddr_esame", "*la_ccclobber"): Replace by ...
("*la_64_cc", "*la_31_cc", splitters): ... these.
("*la_31"): Deactivate for TARGET_64BIT.
("*la_31_and", "*la_31_and_cc"): New.
2002-09-24 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> 2002-09-24 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* real.h (real_value): Make `exp' explicitly signed. * real.h (real_value): Make `exp' explicitly signed.
......
...@@ -50,6 +50,7 @@ extern enum machine_mode s390_tm_ccmode PARAMS ((rtx, rtx, int)); ...@@ -50,6 +50,7 @@ extern enum machine_mode s390_tm_ccmode PARAMS ((rtx, rtx, int));
extern enum machine_mode s390_select_ccmode PARAMS ((enum rtx_code, rtx, rtx)); extern enum machine_mode s390_select_ccmode PARAMS ((enum rtx_code, rtx, rtx));
extern int symbolic_reference_mentioned_p PARAMS ((rtx)); extern int symbolic_reference_mentioned_p PARAMS ((rtx));
extern int legitimate_la_operand_p PARAMS ((rtx)); extern int legitimate_la_operand_p PARAMS ((rtx));
extern int preferred_la_operand_p PARAMS ((rtx, int));
extern int legitimate_pic_operand_p PARAMS ((rtx)); extern int legitimate_pic_operand_p PARAMS ((rtx));
extern int legitimate_constant_p PARAMS ((rtx)); extern int legitimate_constant_p PARAMS ((rtx));
extern int legitimate_reload_constant_p PARAMS ((rtx)); extern int legitimate_reload_constant_p PARAMS ((rtx));
......
...@@ -1756,6 +1756,34 @@ legitimate_la_operand_p (op) ...@@ -1756,6 +1756,34 @@ legitimate_la_operand_p (op)
return FALSE; return FALSE;
} }
/* Return 1 if OP is a valid operand for the LA instruction,
and we prefer to use LA over addition to compute it.
If STRICT is true, only accept operands that will never
change to something we cannot recognize as preferred. */
int
preferred_la_operand_p (op, strict)
register rtx op;
int strict;
{
struct s390_address addr;
if (!s390_decompose_address (op, &addr))
return FALSE;
if (!TARGET_64BIT && !addr.pointer)
return FALSE;
if (addr.pointer)
return TRUE;
if (!strict)
if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
|| (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
return TRUE;
return FALSE;
}
/* Emit a forced load-address operation to load SRC into DST. /* Emit a forced load-address operation to load SRC into DST.
This will use the LOAD ADDRESS instruction even in situations This will use the LOAD ADDRESS instruction even in situations
where legitimate_la_operand_p (SRC) returns false. */ where legitimate_la_operand_p (SRC) returns false. */
......
...@@ -2797,20 +2797,24 @@ ...@@ -2797,20 +2797,24 @@
; adddi3 instruction pattern(s). ; adddi3 instruction pattern(s).
; ;
(define_insn "addaddr_esame" (define_insn "*la_64_cc"
[(set (match_operand:DI 0 "register_operand" "=a,a") [(set (match_operand:DI 0 "register_operand" "=d")
(plus:DI (match_operand:DI 1 "register_operand" "%a,a") (match_operand:QI 1 "address_operand" "p"))
(match_operand:DI 2 "nonmemory_operand" "J,a")))] (clobber (reg:CC 33))]
"TARGET_64BIT && (((REGNO (operands[1]) == STACK_POINTER_REGNUM ) || "TARGET_64BIT
(REGNO (operands[1]) == BASE_REGISTER)) && && preferred_la_operand_p (operands[1], 1)"
(GET_CODE (operands[2]) == REG || "#"
CONST_OK_FOR_LETTER_P (INTVAL (operands[2]),'J')))" [(set_attr "op_type" "RX")
"@ (set_attr "atype" "mem")
la\\t%0,%c2(,%1) (set_attr "type" "la")])
la\\t%0,0(%1,%2)"
[(set_attr "op_type" "RX") (define_split
(set_attr "atype" "mem") [(set (match_operand:DI 0 "register_operand" "")
(set_attr "type" "la")]) (match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))]
"TARGET_64BIT && reload_completed
&& preferred_la_operand_p (operands[1], 0)"
[(set (match_dup 0) (match_dup 1))])
(define_insn "*adddi3_sign" (define_insn "*adddi3_sign"
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
...@@ -2997,15 +3001,24 @@ ...@@ -2997,15 +3001,24 @@
; addsi3 instruction pattern(s). ; addsi3 instruction pattern(s).
; ;
(define_insn "*la_ccclobber" (define_insn "*la_31_cc"
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:QI 1 "address_operand" "p")) (match_operand:QI 1 "address_operand" "p"))
(clobber (reg:CC 33))] (clobber (reg:CC 33))]
"legitimate_la_operand_p (operands[1])" "!TARGET_64BIT
"la\\t%0,%a1" && preferred_la_operand_p (operands[1], 1)"
[(set_attr "op_type" "RX") "#"
(set_attr "atype" "mem") [(set_attr "op_type" "RX")
(set_attr "type" "la")]) (set_attr "atype" "mem")
(set_attr "type" "la")])
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))]
"!TARGET_64BIT && reload_completed
&& preferred_la_operand_p (operands[1], 0)"
[(set (match_dup 0) (match_dup 1))])
(define_insn "*addsi3_imm_cc" (define_insn "*addsi3_imm_cc"
[(set (reg 33) [(set (reg 33)
...@@ -3149,12 +3162,37 @@ ...@@ -3149,12 +3162,37 @@
(define_insn "*la_31" (define_insn "*la_31"
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:QI 1 "address_operand" "p"))] (match_operand:QI 1 "address_operand" "p"))]
"legitimate_la_operand_p (operands[1])" "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
"la\\t%0,%a1"
[(set_attr "op_type" "RX")
(set_attr "atype" "mem")
(set_attr "type" "la")])
(define_insn "*la_31_and"
[(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (match_operand:QI 1 "address_operand" "p")
(const_int 2147483647)))]
"!TARGET_64BIT"
"la\\t%0,%a1" "la\\t%0,%a1"
[(set_attr "op_type" "RX") [(set_attr "op_type" "RX")
(set_attr "atype" "mem") (set_attr "atype" "mem")
(set_attr "type" "la")]) (set_attr "type" "la")])
(define_insn_and_split "*la_31_and_cc"
[(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (match_operand:QI 1 "address_operand" "p")
(const_int 2147483647)))
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(and:SI (match_dup 1) (const_int 2147483647)))]
""
[(set_attr "op_type" "RX")
(set_attr "atype" "mem")
(set_attr "type" "la")])
(define_insn "force_la_31" (define_insn "force_la_31"
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:QI 1 "address_operand" "p")) (match_operand:QI 1 "address_operand" "p"))
......
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