sparc.h (LEGITIMATE_CONSTANT_P): Consider TFmode 0.0L as legitimate constant if -mvis.

	* config/sparc/sparc.h (LEGITIMATE_CONSTANT_P): Consider TFmode 0.0L
	as legitimate constant if -mvis.
	* config/sparc/sparc.md (movtf): Likewise.
	(clear_sf): Use const_double_operand.
	(clear_sfp, clear_dfp, clear_tf, clear_tfp): New patterns.

From-SVN: r30823

gcc/ChangeLog

@@ -9,6 +9,12 @@
 	so that it is actually matched.
 	(sethi_di_medlow): Likewise.
 
+	* config/sparc/sparc.h (LEGITIMATE_CONSTANT_P): Consider TFmode 0.0L
+	as legitimate constant if -mvis.
+	* config/sparc/sparc.md (movtf): Likewise.
+	(clear_sf): Use const_double_operand.
+	(clear_sfp, clear_dfp, clear_tf, clear_tfp): New patterns.
+
 Tue Dec  7 19:22:06 1999  Richard Henderson  <rth@cygnus.com>
 
 	* loop.h (struct induction): Add multi_insn_incr.

gcc/config/sparc/sparc.h

@@ -2250,7 +2250,9 @@ LFLGRET"ID":\n\
 
 #define LEGITIMATE_CONSTANT_P(X) 					\
   (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode || 		\
-   (TARGET_VIS && (GET_MODE (X) == SFmode || GET_MODE (X) == DFmode) &&	\
+   (TARGET_VIS &&							\
+    (GET_MODE (X) == SFmode || GET_MODE (X) == DFmode ||		\
+     GET_MODE (X) == TFmode) &&						\
     fp_zero_operand (X)))
 
 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx

gcc/config/sparc/sparc.md

@@ -2750,15 +2750,22 @@
 
 (define_insn "*clear_sf"
   [(set (match_operand:SF 0 "register_operand" "=f")
-        (match_operand:SF 1 "" ""))]
+        (match_operand:SF 1 "const_double_operand" ""))]
   "TARGET_VIS
-   && GET_CODE (operands[1]) == CONST_DOUBLE
-   && GET_CODE (operands[0]) == REG
    && fp_zero_operand (operands[1])"
   "fzeros\\t%0"
   [(set_attr "type" "fpmove")
    (set_attr "length" "1")])
 
+(define_insn "*clear_sfp"
+  [(set (match_operand:SF 0 "memory_operand" "=m")
+        (match_operand:SF 1 "const_double_operand" ""))]
+  "! TARGET_LIVE_G0
+   && fp_zero_operand (operands[1])"
+  "st\\t%%g0, %0"
+  [(set_attr "type" "store")
+   (set_attr "length" "1")])
+
 (define_insn "*movsf_const_intreg"
   [(set (match_operand:SF 0 "register_operand" "=f,r")
         (match_operand:SF 1 "const_double_operand" "m#F,F"))]
@@ -2927,6 +2934,16 @@
   [(set_attr "type" "fpmove")
    (set_attr "length" "1")])
 
+(define_insn "*clear_dfp"
+  [(set (match_operand:DF 0 "memory_operand" "=m")
+        (match_operand:DF 1 "const_double_operand" ""))]
+  "! TARGET_LIVE_G0
+   && TARGET_V9
+   && fp_zero_operand (operands[1])"
+  "stx\\t%%g0, %0"
+  [(set_attr "type" "store")
+   (set_attr "length" "1")])
+
 (define_insn "*movdf_const_intreg_sp32"
   [(set (match_operand:DF 0 "register_operand" "=e,e,?r")
         (match_operand:DF 1 "const_double_operand" "T#F,o#F,F"))]
@@ -3278,6 +3295,52 @@
   DONE;
 }")
 
+(define_insn "*clear_tf"
+  [(set (match_operand:TF 0 "register_operand" "=e")
+        (match_operand:TF 1 "const_double_operand" ""))]
+  "TARGET_VIS
+   && fp_zero_operand (operands[1])"
+  "#"
+  [(set_attr "type" "fpmove")
+   (set_attr "length" "2")])
+
+(define_split
+  [(set (match_operand:TF 0 "register_operand" "")
+        (match_operand:TF 1 "const_double_operand" ""))]
+  "TARGET_VIS && reload_completed
+   && fp_zero_operand (operands[1])"
+  [(set (subreg:DF (match_dup 0) 0) (match_dup 1))
+   (set (subreg:DF (match_dup 0) 8) (match_dup 1))]
+  "
+{
+  operands[1] = CONST0_RTX (DFmode);
+}
+")
+
+(define_insn "*clear_tfp"
+  [(set (match_operand:TF 0 "memory_operand" "=m")
+        (match_operand:TF 1 "const_double_operand" ""))]
+  "! TARGET_LIVE_G0
+   && TARGET_V9
+   && fp_zero_operand (operands[1])"
+  "#"
+  [(set_attr "type" "fpmove")
+   (set_attr "length" "2")])
+
+(define_split
+  [(set (match_operand:TF 0 "memory_operand" "=m")
+        (match_operand:TF 1 "const_double_operand" ""))]
+  "! TARGET_LIVE_G0
+   && TARGET_V9 && reload_completed
+   && fp_zero_operand (operands[1])"
+  [(set (subreg:DF (match_dup 0) 0) (match_dup 1))
+   (set (subreg:DF (match_dup 0) 8) (match_dup 1))]
+  "
+{
+  operands[1] = CONST0_RTX (DFmode);
+}
+")
+
 (define_expand "movtf"
   [(set (match_operand:TF 0 "general_operand" "")
 	(match_operand:TF 1 "general_operand" ""))]
@@ -3288,6 +3351,11 @@
   if (GET_CODE (operands[0]) == REG
       && CONSTANT_P (operands[1]))
     {
+      if (TARGET_VIS
+          && GET_CODE (operands[1]) == CONST_DOUBLE
+	  && fp_zero_operand (operands[1]))
+	goto movtf_is_ok;
+
       /* emit_group_store will send such bogosity to us when it is
          not storing directly into memory.  So fix this up to avoid
          crashes in output_constant_pool.  */