mips.opt (mfix-24k): New.

2011-04-20  Catherine Moore  <clm@codesourcery.com>

	* config/mips/mips.opt (mfix-24k): New.
	* config/mips/mips.h (ASM_SPEC): Handle -mfix-24k.
	* config/mips/mips.md (length): Increase by 4 for stores if
	fixing 24K errata.
	* config/mips/mips.c (mips_reorg_process_insns): Do not allow
	all noreorder if fixing 24K errata.
	* doc/invoke.texi: Document mfix-24k.

From-SVN: r172780

gcc/ChangeLog

+2011-04-20  Catherine Moore  <clm@codesourcery.com>
+
+	* config/mips/mips.opt (mfix-24k): New.
+	* config/mips/mips.h (ASM_SPEC): Handle -mfix-24k.
+	* config/mips/mips.md (length): Increase by 4 for stores if
+	fixing 24K errata.
+	* config/mips/mips.c (mips_reorg_process_insns): Do not allow
+	all noreorder if fixing 24K errata.
+	* doc/invoke.texi: Document mfix-24k.
+
 2011-04-20  Chung-Lin Tang  <cltang@codesourcery.com>
 
 	* config/arm/arm.c (arm_legitimize_reload_address): For NEON

gcc/config/mips/mips.c

@@ -14886,9 +14886,9 @@ mips_reorg_process_insns (void)
   if (crtl->profile)
     cfun->machine->all_noreorder_p = false;
 
-  /* Code compiled with -mfix-vr4120 can't be all noreorder because
-     we rely on the assembler to work around some errata.  */
-  if (TARGET_FIX_VR4120)
+  /* Code compiled with -mfix-vr4120 or -mfix-24k can't be all noreorder
+     because we rely on the assembler to work around some errata.  */
+  if (TARGET_FIX_VR4120 || TARGET_FIX_24K)
     cfun->machine->all_noreorder_p = false;
 
   /* The same is true for -mfix-vr4130 if we might generate MFLO or

gcc/config/mips/mips.h

@@ -1134,6 +1134,7 @@ enum mips_code_readable_setting {
 %{msmartmips} %{mno-smartmips} \
 %{mmt} %{mno-mt} \
 %{mfix-vr4120} %{mfix-vr4130} \
+%{mfix-24k} \
 %(subtarget_asm_optimizing_spec) \
 %(subtarget_asm_debugging_spec) \
 %{mabi=*} %{!mabi=*: %(asm_abi_default_spec)} \

gcc/config/mips/mips.md

@@ -479,7 +479,9 @@
 	  (eq_attr "move_type" "load,fpload")
 	  (symbol_ref "mips_load_store_insns (operands[1], insn) * 4")
 	  (eq_attr "move_type" "store,fpstore")
-	  (symbol_ref "mips_load_store_insns (operands[0], insn) * 4")
+	  (cond [(eq (symbol_ref "TARGET_FIX_24K") (const_int 0))
+	         (symbol_ref "mips_load_store_insns (operands[0], insn) * 4")]
+	         (symbol_ref "mips_load_store_insns (operands[0], insn) * 4 + 4"))
 
 	  ;; In the worst case, a call macro will take 8 instructions:
 	  ;;

gcc/config/mips/mips.opt

@@ -110,6 +110,10 @@ mextern-sdata
 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
 Use -G for data that is not defined by the current object
 
+mfix-24k
+Target Report Var(TARGET_FIX_24K)
+Work around certain 24K errata
+
 mfix-r4000
 Target Report Mask(FIX_R4000)
 Work around certain R4000 errata

gcc/doc/invoke.texi

@@ -714,6 +714,7 @@ Objective-C and Objective-C++ Dialects}.
 -mdivide-traps  -mdivide-breaks @gol
 -mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls @gol
 -mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp @gol
+-mfix-24k -mno-fix-24k @gol
 -mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400 @gol
 -mfix-r10000 -mno-fix-r10000  -mfix-vr4120  -mno-fix-vr4120 @gol
 -mfix-vr4130  -mno-fix-vr4130  -mfix-sb1  -mno-fix-sb1 @gol
@@ -14602,6 +14603,13 @@ circumstances.
 Tell the MIPS assembler to not run its preprocessor over user
 assembler files (with a @samp{.s} suffix) when assembling them.
 
+@item -mfix-24k
+@item -mno-fix-24k
+@opindex mfix-24k
+@opindex mno-fix-24k
+Work around the 24K E48 (lost data on stores during refill) errata.
+The workarounds are implemented by the assembler rather than by GCC.
+
 @item -mfix-r4000
 @itemx -mno-fix-r4000
 @opindex mfix-r4000