Commit 0e93e1b4 by Uros Bizjak Committed by Uros Bizjak

re PR target/33555 (x86 missed opportunity for sbb)

        PR target/33555
        * config/i386/i386.md (*x86_movsicc_0_m1_se): New insn pattern.
        (*x86_movdicc_0_m1_se): Ditto.

testsuite/ChangeLog:

        PR target/33555
        * gcc.target/i386/pr33555.c: New test.

From-SVN: r132414
parent 02d353cf
2008-02-19 Uros Bizjak <ubizjak@gmail.com> 2008-02-19 Uros Bizjak <ubizjak@gmail.com>
PR target/33555
* config/i386/i386.md (*x86_movsicc_0_m1_se): New insn pattern.
(*x86_movdicc_0_m1_se): Ditto.
2008-02-19 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sfp-machine.h (__gcc_CMPtype): New typedef. * config/i386/sfp-machine.h (__gcc_CMPtype): New typedef.
(CMPtype): Define as __gcc_CMPtype. (CMPtype): Define as __gcc_CMPtype.
* config/rs6000/sfp-machine.h (__gcc_CMPtype): New typedef. * config/rs6000/sfp-machine.h (__gcc_CMPtype): New typedef.
......
...@@ -19402,6 +19402,21 @@ ...@@ -19402,6 +19402,21 @@
(set_attr "mode" "DI") (set_attr "mode" "DI")
(set_attr "length_immediate" "0")]) (set_attr "length_immediate" "0")])
(define_insn "*x86_movdicc_0_m1_se"
[(set (match_operand:DI 0 "register_operand" "=r")
(sign_extract:DI (match_operand 1 "ix86_carry_flag_operator" "")
(const_int 1)
(const_int 0)))
(clobber (reg:CC FLAGS_REG))]
""
"sbb{q}\t%0, %0"
[(set_attr "type" "alu")
(set_attr "pent_pair" "pu")
(set_attr "memory" "none")
(set_attr "imm_disp" "false")
(set_attr "mode" "DI")
(set_attr "length_immediate" "0")])
(define_insn "*movdicc_c_rex64" (define_insn "*movdicc_c_rex64"
[(set (match_operand:DI 0 "register_operand" "=r,r") [(set (match_operand:DI 0 "register_operand" "=r,r")
(if_then_else:DI (match_operator 1 "ix86_comparison_operator" (if_then_else:DI (match_operator 1 "ix86_comparison_operator"
...@@ -19445,6 +19460,21 @@ ...@@ -19445,6 +19460,21 @@
(set_attr "mode" "SI") (set_attr "mode" "SI")
(set_attr "length_immediate" "0")]) (set_attr "length_immediate" "0")])
(define_insn "*x86_movsicc_0_m1_se"
[(set (match_operand:SI 0 "register_operand" "=r")
(sign_extract:SI (match_operand 1 "ix86_carry_flag_operator" "")
(const_int 1)
(const_int 0)))
(clobber (reg:CC FLAGS_REG))]
""
"sbb{l}\t%0, %0"
[(set_attr "type" "alu")
(set_attr "pent_pair" "pu")
(set_attr "memory" "none")
(set_attr "imm_disp" "false")
(set_attr "mode" "SI")
(set_attr "length_immediate" "0")])
(define_insn "*movsicc_noc" (define_insn "*movsicc_noc"
[(set (match_operand:SI 0 "register_operand" "=r,r") [(set (match_operand:SI 0 "register_operand" "=r,r")
(if_then_else:SI (match_operator 1 "ix86_comparison_operator" (if_then_else:SI (match_operator 1 "ix86_comparison_operator"
......
2008-02-19 Uros Bizjak <ubizjak@gmail.com>
PR target/33555
* gcc.target/i386/pr33555.c: New test.
2008-02-18 H.J. Lu <hongjiu.lu@intel.com> 2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/35189 PR target/35189
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-final { scan-assembler "sbbl" } } */
int test(unsigned long a, unsigned long b)
{
return -(a < b);
}
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