mips.h (SPECIAL_MODE_PREDICATES): New.

        * mips.h (SPECIAL_MODE_PREDICATES): New.
        * mips.md (*) Use nonimmediate_operand not general_operand for outputs.
        (movdi+1, movsi+1): Add output reload constraint.
        (casesi_internal): Likewise.  Fix commentary.
        (return_internal): Use pmode_register_operand.

From-SVN: r30009

gcc/ChangeLog

+Thu Oct 14 23:50:25 1999  Richard Henderson  <rth@cygnus.com>
+
+	* mips.h (SPECIAL_MODE_PREDICATES): New.
+	* mips.md (*) Use nonimmediate_operand not general_operand for outputs.
+	(movdi+1, movsi+1): Add output reload constraint.
+	(casesi_internal): Likewise.  Fix commentary.
+	(return_internal): Use pmode_register_operand.
+
 Thu Oct 14 23:19:34 1999  Richard Henderson  <rth@cygnus.com>
 
 	* 1750a.md (movstrqi): Add missing output reload constraint.

gcc/config/mips/mips.h

@@ -3750,6 +3750,11 @@ while (0)
   {"extend_operator",           { SIGN_EXTEND, ZERO_EXTEND }},          \
   {"highpart_shift_operator",   { ASHIFTRT, LSHIFTRT, ROTATERT, ROTATE }},
 
+/* A list of predicates that do special things with modes, and so
+   should not elicit warnings for VOIDmode match_operand.  */
+
+#define SPECIAL_MODE_PREDICATES \
+  "pc_or_label_operand",
 
 
 /* If defined, a C statement to be executed just prior to the

gcc/config/mips/mips.md

@@ -4066,7 +4066,7 @@ move\\t%0,%z4\\n\\
 ;; registers are not supported).
 
 (define_insn "fix_truncdfsi2"
-  [(set (match_operand:SI 0 "general_operand" "=d,*f,R,To")
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,*f,R,To")
 	(fix:SI (match_operand:DF 1 "register_operand" "f,*f,f,f")))
    (clobber (match_scratch:SI 2 "=d,*d,&d,&d"))
    (clobber (match_scratch:DF 3 "=f,?*X,f,f"))]
@@ -4091,7 +4091,7 @@ move\\t%0,%z4\\n\\
 
 
 (define_insn "fix_truncsfsi2"
-  [(set (match_operand:SI 0 "general_operand" "=d,*f,R,To")
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,*f,R,To")
 	(fix:SI (match_operand:SF 1 "register_operand" "f,*f,f,f")))
    (clobber (match_scratch:SI 2 "=d,*d,&d,&d"))
    (clobber (match_scratch:SF 3 "=f,?*X,f,f"))]
@@ -4125,7 +4125,7 @@ move\\t%0,%z4\\n\\
 ;;; If this is disabled, then fixuns_truncdfdi2 must be disabled also.
 
 (define_insn "fix_truncdfdi2"
-  [(set (match_operand:DI 0 "general_operand" "=d,*f,R,To")
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,*f,R,To")
 	(fix:DI (match_operand:DF 1 "register_operand" "f,*f,f,f")))
    (clobber (match_scratch:DF 2 "=f,?*X,f,f"))]
   "TARGET_HARD_FLOAT && TARGET_64BIT && TARGET_DOUBLE_FLOAT"
@@ -4152,7 +4152,7 @@ move\\t%0,%z4\\n\\
 ;;; but not in the chapter that describes the FPU.  It is not mentioned at all
 ;;; in the 1991 manuals.  The r4000 at Cygnus does not have this instruction.
 (define_insn "fix_truncsfdi2"
-  [(set (match_operand:DI 0 "general_operand" "=d,*f,R,To")
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,*f,R,To")
 	(fix:DI (match_operand:SF 1 "register_operand" "f,*f,f,f")))
    (clobber (match_scratch:DF 2 "=f,?*X,f,f"))]
   "TARGET_HARD_FLOAT && TARGET_64BIT && TARGET_DOUBLE_FLOAT"
@@ -4825,7 +4825,7 @@ move\\t%0,%z4\\n\\
 ;; instruction can be generated by save_restore_insns.
 
 (define_insn ""
-  [(set (match_operand:DI 0 "memory_operand" "R,m")
+  [(set (match_operand:DI 0 "memory_operand" "=R,m")
 	(reg:DI 31))]
   "TARGET_MIPS16 && TARGET_64BIT"
   "*
@@ -5247,7 +5247,7 @@ move\\t%0,%z4\\n\\
 ;; instruction can be generated by save_restore_insns.
 
 (define_insn ""
-  [(set (match_operand:SI 0 "memory_operand" "R,m")
+  [(set (match_operand:SI 0 "memory_operand" "=R,m")
 	(reg:SI 31))]
   "TARGET_MIPS16"
   "*
@@ -9239,7 +9239,7 @@ move\\t%0,%z4\\n\\
 
 ;; An embedded PIC switch statement looks like this:
 ;;	bal	$LS1
-;;	sll	$reg,$index,2
+;;	sll	$reg,$reg,2
 ;; $LS1:
 ;;	addu	$reg,$reg,$31
 ;;	lw	$reg,$L1-$LS1($reg)
@@ -9249,13 +9249,15 @@ move\\t%0,%z4\\n\\
 ;;	.word	case1-$LS1
 ;;	.word	case2-$LS1
 ;;	...
+;;
+;; ??? So how does operand 2 get used?
 
 (define_insn "casesi_internal"
   [(set (pc)
 	(mem:SI (plus:SI (mult:SI (match_operand:SI 0 "register_operand" "d")
 				  (const_int 4))
 			 (label_ref (match_operand 1 "" "")))))
-   (clobber (match_operand:SI 2 "register_operand" "d"))
+   (clobber (match_operand:SI 2 "register_operand" "=d"))
    (clobber (reg:SI 31))]
   "TARGET_EMBEDDED_PIC"
   "*
@@ -9383,10 +9385,9 @@ move\\t%0,%z4\\n\\
    (set_attr "mode"	"none")])
 
 ;; Normal return.
-;; We match any mode for the return address, so that this will work with
-;; both 32 bit and 64 bit targets.
+
 (define_insn "return_internal"
-  [(use (match_operand 0 "register_operand" ""))
+  [(use (match_operand 0 "pmode_register_operand" ""))
    (return)]
   ""
   "*