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riscv-gcc-1
Commit 0e7e9155 by Richard Henderson
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mips.h (SPECIAL_MODE_PREDICATES): New. 

        * mips.h (SPECIAL_MODE_PREDICATES): New.
        * mips.md (*) Use nonimmediate_operand not general_operand for outputs.
        (movdi+1, movsi+1): Add output reload constraint.
        (casesi_internal): Likewise.  Fix commentary.
        (return_internal): Use pmode_register_operand.

From-SVN: r30009
parent 997718c7
Showing with 43 additions and 29 deletions
gcc/ChangeLog
Thu Oct 14 23:50:25 1999 Richard Henderson <rth@cygnus.com>
* mips.h (SPECIAL_MODE_PREDICATES): New.
* mips.md (*) Use nonimmediate_operand not general_operand for outputs.
(movdi+1, movsi+1): Add output reload constraint.
(casesi_internal): Likewise. Fix commentary.
(return_internal): Use pmode_register_operand.
Thu Oct 14 23:19:34 1999 Richard Henderson <rth@cygnus.com>
* 1750a.md (movstrqi): Add missing output reload constraint.
......@@ -411,7 +419,7 @@ Wed Oct 13 10:07:54 1999 Richard Henderson <rth@cygnus.com>
Wed Oct 13 01:44:29 1999 Carol LePage <carolo@hal.com>
* configure.in (sparc-hal-solaris2*): Fix xm_file, xm_defines,
* configure.in (sparc-hal-solaris2*): Fix xm_file, xm_defines,
float_format and thread_file definitions.
* configure: Rebuilt.
......@@ -438,10 +446,10 @@ Tue Oct 12 17:09:38 1999 David Edelsohn <edelsohn@gnu.org>
Tue Oct 12 09:45:19 1999 Jonathan Larmour <jlarmour@cygnus.co.uk>
* config/rs6000/eabi-ctors.c (__do_global_ctors): Run through
__CTOR_LIST__ in opposite order, which is the correct order for sorted
constructors.
(__do_global_dtors): similarly for __DTOR_LIST__.
* config/rs6000/eabi-ctors.c (__do_global_ctors): Run through
__CTOR_LIST__ in opposite order, which is the correct order for sorted
constructors.
(__do_global_dtors): similarly for __DTOR_LIST__.
Fri Oct 8 19:46:03 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
Diego Novillo <dnovillo@cygnus.com>
......@@ -595,10 +603,10 @@ Sun Oct 10 00:43:08 1999 Richard Henderson <rth@cygnus.com>
Sat Oct 9 23:26:55 1999 Jeffrey A Law (law@cygnus.com)
* gcse.c (gcse_main): Avoid global optimizations if we have a
large number of basic blocks and the ratio of edges to blocks
is high.
(delete_null_pointer_checks): Likewise.
* gcse.c (gcse_main): Avoid global optimizations if we have a
large number of basic blocks and the ratio of edges to blocks
is high.
(delete_null_pointer_checks): Likewise.
Sat Oct 9 23:16:01 1999 Ken Raeburn <raeburn@mit.edu>
......@@ -746,11 +754,11 @@ Thu Oct 7 23:06:50 1999 Richard Henderson <rth@cygnus.com>
Thu Oct 7 22:53:00 1999 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
Mark Mitchell <mark@codesourcery.com>
* tree.c (make_lang_type_fn): New funtion pointer.
(make_lang_type): Call it.
* tree.h (make_lang_type): Declare.
(make_lang_type_fn): Likewise.
* rs6000.c (rs6000_build_va_list): Use make_lang_type.
* tree.c (make_lang_type_fn): New funtion pointer.
(make_lang_type): Call it.
* tree.h (make_lang_type): Declare.
(make_lang_type_fn): Likewise.
* rs6000.c (rs6000_build_va_list): Use make_lang_type.
Thu Oct 7 00:36:17 1999 Diego Novillo <dnovillo@cygnus.com>
......@@ -893,7 +901,7 @@ Tue Oct 5 11:34:52 1999 Michael Meissner <meissner@cygnus.com>
* ggc-simple.c (toplevel): Ditto.
Mon Oct 4 16:48:16 1999 Diego Novillo <dnovillo@cygnus.com>
Jonathan Larmour <jlarmour@cygnus.co.uk>
Jonathan Larmour <jlarmour@cygnus.co.uk>
* config/mips/mips.c (mips_move_2words): Split doubles if
ISA >= 3, !TARGET_64BIT, and destination is not an FP register.
......@@ -1721,12 +1729,12 @@ Wed Sep 22 06:06:57 1999 Jeffrey A Law (law@cygnus.com)
* pa.c, pa.h, pa.md: Support multiple assembler dialects in
most assembler templates.
* pa.c (hppa_legitimize_address): Handle full offsets for PA2.0
FP loads and stores.
* pa.c (hppa_legitimize_address): Handle full offsets for PA2.0
FP loads and stores.
(following_call): Always return zero for the PA8000.
* pa.h (GO_IF_LEGITIMATE_ADDRESS): Handle full offsets for PA2.0
FP loads and stores.
(LEGITIMIZE_RELOAD_ADDRESS): Similarly.
(LEGITIMIZE_RELOAD_ADDRESS): Similarly.
* pa.h (BRANCH_COST): Define.
......
gcc/config/mips/mips.h
......@@ -3750,6 +3750,11 @@ while (0)
{"extend_operator", { SIGN_EXTEND, ZERO_EXTEND }}, \
{"highpart_shift_operator", { ASHIFTRT, LSHIFTRT, ROTATERT, ROTATE }},
/* A list of predicates that do special things with modes, and so
should not elicit warnings for VOIDmode match_operand. */
#define SPECIAL_MODE_PREDICATES \
"pc_or_label_operand",
/* If defined, a C statement to be executed just prior to the
......
gcc/config/mips/mips.md
......@@ -4066,7 +4066,7 @@ move\\t%0,%z4\\n\\
;; registers are not supported).
(define_insn "fix_truncdfsi2"
[(set (match_operand:SI 0 "general_operand" "=d,*f,R,To")
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,*f,R,To")
(fix:SI (match_operand:DF 1 "register_operand" "f,*f,f,f")))
(clobber (match_scratch:SI 2 "=d,*d,&d,&d"))
(clobber (match_scratch:DF 3 "=f,?*X,f,f"))]
......@@ -4091,7 +4091,7 @@ move\\t%0,%z4\\n\\
(define_insn "fix_truncsfsi2"
[(set (match_operand:SI 0 "general_operand" "=d,*f,R,To")
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,*f,R,To")
(fix:SI (match_operand:SF 1 "register_operand" "f,*f,f,f")))
(clobber (match_scratch:SI 2 "=d,*d,&d,&d"))
(clobber (match_scratch:SF 3 "=f,?*X,f,f"))]
......@@ -4125,7 +4125,7 @@ move\\t%0,%z4\\n\\
;;; If this is disabled, then fixuns_truncdfdi2 must be disabled also.
(define_insn "fix_truncdfdi2"
[(set (match_operand:DI 0 "general_operand" "=d,*f,R,To")
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,*f,R,To")
(fix:DI (match_operand:DF 1 "register_operand" "f,*f,f,f")))
(clobber (match_scratch:DF 2 "=f,?*X,f,f"))]
"TARGET_HARD_FLOAT && TARGET_64BIT && TARGET_DOUBLE_FLOAT"
......@@ -4152,7 +4152,7 @@ move\\t%0,%z4\\n\\
;;; but not in the chapter that describes the FPU. It is not mentioned at all
;;; in the 1991 manuals. The r4000 at Cygnus does not have this instruction.
(define_insn "fix_truncsfdi2"
[(set (match_operand:DI 0 "general_operand" "=d,*f,R,To")
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,*f,R,To")
(fix:DI (match_operand:SF 1 "register_operand" "f,*f,f,f")))
(clobber (match_scratch:DF 2 "=f,?*X,f,f"))]
"TARGET_HARD_FLOAT && TARGET_64BIT && TARGET_DOUBLE_FLOAT"
......@@ -4825,7 +4825,7 @@ move\\t%0,%z4\\n\\
;; instruction can be generated by save_restore_insns.
(define_insn ""
[(set (match_operand:DI 0 "memory_operand" "R,m")
[(set (match_operand:DI 0 "memory_operand" "=R,m")
(reg:DI 31))]
"TARGET_MIPS16 && TARGET_64BIT"
"*
......@@ -5247,7 +5247,7 @@ move\\t%0,%z4\\n\\
;; instruction can be generated by save_restore_insns.
(define_insn ""
[(set (match_operand:SI 0 "memory_operand" "R,m")
[(set (match_operand:SI 0 "memory_operand" "=R,m")
(reg:SI 31))]
"TARGET_MIPS16"
"*
......@@ -9239,7 +9239,7 @@ move\\t%0,%z4\\n\\
;; An embedded PIC switch statement looks like this:
;; bal $LS1
;; sll $reg,$index,2
;; sll $reg,$reg,2
;; $LS1:
;; addu $reg,$reg,$31
;; lw $reg,$L1-$LS1($reg)
......@@ -9249,13 +9249,15 @@ move\\t%0,%z4\\n\\
;; .word case1-$LS1
;; .word case2-$LS1
;; ...
;;
;; ??? So how does operand 2 get used?
(define_insn "casesi_internal"
[(set (pc)
(mem:SI (plus:SI (mult:SI (match_operand:SI 0 "register_operand" "d")
(const_int 4))
(label_ref (match_operand 1 "" "")))))
(clobber (match_operand:SI 2 "register_operand" "d"))
(clobber (match_operand:SI 2 "register_operand" "=d"))
(clobber (reg:SI 31))]
"TARGET_EMBEDDED_PIC"
"*
......@@ -9383,10 +9385,9 @@ move\\t%0,%z4\\n\\
(set_attr "mode" "none")])
;; Normal return.
;; We match any mode for the return address, so that this will work with
;; both 32 bit and 64 bit targets.
(define_insn "return_internal"
[(use (match_operand 0 "register_operand" ""))
[(use (match_operand 0 "pmode_register_operand" ""))
(return)]
""
"*
......
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