i386.c (standard_sse_constant_p): Accept vector and integer zeros too.

	* i386.c (standard_sse_constant_p): Accept vector and integer zeros too.
	* i386.h (EXTRA_CONSTRAINT): Recognize 'C'
	* i386.md (movti_internal): Use 'C'

	* xmmintrin.h (_mm_cmplt_epi*): New.

From-SVN: r58423

gcc/ChangeLog

+Wed Oct 23 00:33:11 CEST 2002  Jan Hubicka  <jh@suse,cz>
+
+	* i386.c (standard_sse_constant_p): Accept vector and integer zeros too.
+	* i386.h (EXTRA_CONSTRAINT): Recognize 'C'
+	* i386.md (movti_internal): Use 'C'
+
+	* xmmintrin.h (_mm_cmplt_epi*): New.
+
 2002-10-22  Ulrich Weigand  <uweigand@de.ibm.com>
 
 	* config/s390/s390.md ("*movdi_64"): Fix op_type attribute.

gcc/config/i386/i386.c

@@ -3749,8 +3749,8 @@ int
 standard_sse_constant_p (x)
      rtx x;
 {
-  if (GET_CODE (x) != CONST_DOUBLE)
-    return -1;
+  if (x == const0_rtx)
+    return 1;
   return (x == CONST0_RTX (GET_MODE (x)));
 }
 

gcc/config/i386/i386.h

@@ -1425,9 +1425,10 @@ enum reg_class
    the constraint letter C.  If C is not defined as an extra
    constraint, the value returned should be 0 regardless of VALUE.  */
 
-#define EXTRA_CONSTRAINT(VALUE, C)				\
-  ((C) == 'e' ? x86_64_sign_extended_value (VALUE, 0)		\
-   : (C) == 'Z' ? x86_64_zero_extended_value (VALUE)		\
+#define EXTRA_CONSTRAINT(VALUE, D)				\
+  ((D) == 'e' ? x86_64_sign_extended_value (VALUE, 0)		\
+   : (D) == 'Z' ? x86_64_zero_extended_value (VALUE)		\
+   : (D) == 'C' ? standard_sse_constant_p (VALUE)		\
    : 0)
 
 /* Place additional restrictions on the register class to use when it

gcc/config/i386/i386.md

@@ -18145,7 +18145,7 @@
 
 (define_insn "movti_internal"
   [(set (match_operand:TI 0 "nonimmediate_operand" "=x,x,m")
-	(match_operand:TI 1 "general_operand" "O,xm,x"))]
+	(match_operand:TI 1 "general_operand" "C,xm,x"))]
   "TARGET_SSE && !TARGET_64BIT"
   "@
    xorps\t%0, %0

gcc/config/i386/xmmintrin.h

@@ -2308,6 +2308,24 @@ _mm_cmpeq_epi32 (__m128i __A, __m128i __B)
 }
 
 static __inline __m128i
+_mm_cmplt_epi8 (__m128i __A, __m128i __B)
+{
+  return (__m128i)__builtin_ia32_pcmpgtb128 ((__v16qi)__B, (__v16qi)__A);
+}
+
+static __inline __m128i
+_mm_cmplt_epi16 (__m128i __A, __m128i __B)
+{
+  return (__m128i)__builtin_ia32_pcmpgtw128 ((__v8hi)__B, (__v8hi)__A);
+}
+
+static __inline __m128i
+_mm_cmplt_epi32 (__m128i __A, __m128i __B)
+{
+  return (__m128i)__builtin_ia32_pcmpgtd128 ((__v4si)__B, (__v4si)__A);
+}
+
+static __inline __m128i
 _mm_cmpgt_epi8 (__m128i __A, __m128i __B)
 {
   return (__m128i)__builtin_ia32_pcmpgtb128 ((__v16qi)__A, (__v16qi)__B);