i386.md (signbittf2): Emit sse_movmskps for TARGET_SSE.

	* config/i386/i386.md (signbittf2): Emit sse_movmskps for TARGET_SSE.

From-SVN: r237451

gcc/ChangeLog

+2016-06-14  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (signbittf2): Emit sse_movmskps for TARGET_SSE.
+
 2016-06-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
 	* expmed.h: Close parenthesis in "at your option" in copyright

gcc/config/i386/i386.md

@@ -16201,16 +16201,25 @@
 (define_expand "signbittf2"
   [(use (match_operand:SI 0 "register_operand"))
    (use (match_operand:TF 1 "register_operand"))]
-  "TARGET_SSE4_1"
+  "TARGET_SSE"
 {
-  rtx mask = ix86_build_signbit_mask (TFmode, 0, 0);
-  rtx scratch = gen_reg_rtx (QImode);
+  if (TARGET_SSE4_1)
+    {
+      rtx mask = ix86_build_signbit_mask (TFmode, 0, 0);
+      rtx scratch = gen_reg_rtx (QImode);
 
-  emit_insn (gen_ptesttf2 (operands[1], mask));
-  ix86_expand_setcc (scratch, NE,
-		     gen_rtx_REG (CCZmode, FLAGS_REG), const0_rtx);
+      emit_insn (gen_ptesttf2 (operands[1], mask));
+	ix86_expand_setcc (scratch, NE,
+			   gen_rtx_REG (CCZmode, FLAGS_REG), const0_rtx);
 
-  emit_insn (gen_zero_extendqisi2 (operands[0], scratch));
+      emit_insn (gen_zero_extendqisi2 (operands[0], scratch));
+    }
+  else
+    {
+      emit_insn (gen_sse_movmskps (operands[0],
+				   gen_lowpart (V4SFmode, operands[1])));
+      emit_insn (gen_andsi3 (operands[0], operands[0], GEN_INT (0x8)));
+    }
   DONE;
 })