Commit 0d2f38ee by Olivier Hainque Committed by Richard Kenner

expmed.c (extract_bit_field): Reverse operands of && condition to prevent a…

expmed.c (extract_bit_field): Reverse operands of && condition to prevent a potential division by zero in the...

	* expmed.c (extract_bit_field): Reverse operands of && condition to
        prevent a potential division by zero in the previously first branch.
	* config/pa/pa.md (extv, extzv): FAIL if the bitfield length is zero.

From-SVN: r65907
parent d79f9ec9
...@@ -3,6 +3,10 @@ ...@@ -3,6 +3,10 @@
* calls.c (expand_call): Prevent sibcall optimization for calls to * calls.c (expand_call): Prevent sibcall optimization for calls to
nested subprograms. nested subprograms.
* expmed.c (extract_bit_field): Reverse operands of && condition to
prevent a potential division by zero in the previously first branch.
* config/pa/pa.md (extv, extzv): FAIL if the bitfield length is zero.
2003-04-21 Joel Brobecker <brobecker@gnat.com> 2003-04-21 Joel Brobecker <brobecker@gnat.com>
* dwarf2out.c (is_ada, is_ada_subrange_type): New functions. * dwarf2out.c (is_ada, is_ada_subrange_type): New functions.
......
...@@ -7153,6 +7153,10 @@ ...@@ -7153,6 +7153,10 @@
"" ""
" "
{ {
/* PA extraction insns don't support zero length bitfields. */
if (INTVAL (operands[2]) == 0)
FAIL;
if (TARGET_64BIT) if (TARGET_64BIT)
emit_insn (gen_extzv_64 (operands[0], operands[1], emit_insn (gen_extzv_64 (operands[0], operands[1],
operands[2], operands[3])); operands[2], operands[3]));
...@@ -7215,6 +7219,10 @@ ...@@ -7215,6 +7219,10 @@
"" ""
" "
{ {
/* PA extraction insns don't support zero length bitfields. */
if (INTVAL (operands[2]) == 0)
FAIL;
if (TARGET_64BIT) if (TARGET_64BIT)
emit_insn (gen_extv_64 (operands[0], operands[1], emit_insn (gen_extv_64 (operands[0], operands[1],
operands[2], operands[3])); operands[2], operands[3]));
......
...@@ -1104,25 +1104,25 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, ...@@ -1104,25 +1104,25 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
? mode ? mode
: mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0)); : mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0));
if (((GET_CODE (op0) != MEM if (((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode)
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode), && bitpos % BITS_PER_WORD == 0)
GET_MODE_BITSIZE (GET_MODE (op0))) || (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode
&& GET_MODE_SIZE (mode1) != 0 /* ??? The big endian test here is wrong. This is correct
&& byte_offset % GET_MODE_SIZE (mode1) == 0) if the value is in a register, and if mode_for_size is not
|| (GET_CODE (op0) == MEM the same mode as op0. This causes us to get unnecessarily
&& (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0)) inefficient code from the Thumb port when -mbig-endian. */
|| (offset * BITS_PER_UNIT % bitsize == 0 && (BYTES_BIG_ENDIAN
&& MEM_ALIGN (op0) % bitsize == 0)))) ? bitpos + bitsize == BITS_PER_WORD
&& ((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode) : bitpos == 0)))
&& bitpos % BITS_PER_WORD == 0) && ((GET_CODE (op0) != MEM
|| (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
/* ??? The big endian test here is wrong. This is correct GET_MODE_BITSIZE (GET_MODE (op0)))
if the value is in a register, and if mode_for_size is not && GET_MODE_SIZE (mode1) != 0
the same mode as op0. This causes us to get unnecessarily && byte_offset % GET_MODE_SIZE (mode1) == 0)
inefficient code from the Thumb port when -mbig-endian. */ || (GET_CODE (op0) == MEM
&& (BYTES_BIG_ENDIAN && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0))
? bitpos + bitsize == BITS_PER_WORD || (offset * BITS_PER_UNIT % bitsize == 0
: bitpos == 0)))) && MEM_ALIGN (op0) % bitsize == 0)))))
{ {
if (mode1 != GET_MODE (op0)) if (mode1 != GET_MODE (op0))
{ {
......
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