Commit 0c8e7621 by Andre Vieira

Reverting r260635

    gcc
    2018-05-30  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	2018-05-24  Andre Vieira  <andre.simoesdiasvieira@arm.com>

        PR target/83009
	Revert:
        * config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): Make
        address check not strict.

    gcc/testsuite
    2018-05-30  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	2018-05-24  Andre Vieira  <andre.simoesdiasvieira@arm.com>
	Revert
        PR target/83009
        * gcc/target/aarch64/store_v2vec_lanes.c: Add extra tests.
    git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260635 138bc75d-0d04-0410-961f-82ee72b054a4

From-SVN: r260957
parent 7ce4ce10
...@@ -226,7 +226,7 @@ ...@@ -226,7 +226,7 @@
;; as a 128-bit vec_concat. ;; as a 128-bit vec_concat.
(define_predicate "aarch64_mem_pair_lanes_operand" (define_predicate "aarch64_mem_pair_lanes_operand"
(and (match_code "mem") (and (match_code "mem")
(match_test "aarch64_legitimate_address_p (DFmode, XEXP (op, 0), false, (match_test "aarch64_legitimate_address_p (DFmode, XEXP (op, 0), 1,
ADDR_QUERY_LDP_STP)"))) ADDR_QUERY_LDP_STP)")))
(define_predicate "aarch64_prefetch_operand" (define_predicate "aarch64_prefetch_operand"
......
...@@ -22,32 +22,10 @@ construct_lane_2 (long long *y, v2di *z) ...@@ -22,32 +22,10 @@ construct_lane_2 (long long *y, v2di *z)
z[2] = x; z[2] = x;
} }
void
construct_lane_3 (double **py, v2df **pz)
{
double *y = *py;
v2df *z = *pz;
double y0 = y[0] + 1;
double y1 = y[1] + 2;
v2df x = {y0, y1};
z[2] = x;
}
void
construct_lane_4 (long long **py, v2di **pz)
{
long long *y = *py;
v2di *z = *pz;
long long y0 = y[0] + 1;
long long y1 = y[1] + 2;
v2di x = {y0, y1};
z[2] = x;
}
/* We can use the load_pair_lanes<mode> pattern to vec_concat two DI/DF /* We can use the load_pair_lanes<mode> pattern to vec_concat two DI/DF
values from consecutive memory into a 2-element vector by using values from consecutive memory into a 2-element vector by using
a Q-reg LDR. */ a Q-reg LDR. */
/* { dg-final { scan-assembler-times "stp\td\[0-9\]+, d\[0-9\]+" 2 } } */ /* { dg-final { scan-assembler-times "stp\td\[0-9\]+, d\[0-9\]+" 1 { xfail ilp32 } } } */
/* { dg-final { scan-assembler-times "stp\tx\[0-9\]+, x\[0-9\]+" 2 } } */ /* { dg-final { scan-assembler-times "stp\tx\[0-9\]+, x\[0-9\]+" 1 { xfail ilp32 } } } */
/* { dg-final { scan-assembler-not "ins\t" } } */ /* { dg-final { scan-assembler-not "ins\t" { xfail ilp32 } } } */
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