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riscv-gcc-1
Commit 0c6caaf8 by Renlin Li Committed by Jiong Wang
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[AArch64] Add ACLE arch-related predefined macros 

2014-11-06  Renlin Li  <renlin.li@arm.com>

	* config/aarch64/aarch64.c (aarch64_architecture_version): New.
	(processor): New architecture_version field.
	(aarch64_override_options): Initialize aarch64_architecture_version.
	* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH,
	__ARM_ARCH_PROFILE, aarch64_arch_name macro.

From-SVN: r217192
parent 5a6bc9c7
Showing with 28 additions and 5 deletions
gcc/ChangeLog
2014-11-06 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.c (aarch64_architecture_version): New.
(processor): New architecture_version field.
(aarch64_override_options): Initialize aarch64_architecture_version.
* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH,
__ARM_ARCH_PROFILE, aarch64_arch_name macro.
2014-11-06 James Greenhalgh <james.greenhalgh@arm.com>
* params.def (sra-max-scalarization-size-Ospeed): New.
gcc/config/aarch64/aarch64.c
......@@ -154,6 +154,9 @@ static bool aarch64_vectorize_vec_perm_const_ok (machine_mode vmode,
const unsigned char *sel);
static int aarch64_address_cost (rtx, machine_mode, addr_space_t, bool);
/* Major revision number of the ARM Architecture implemented by the target. */
unsigned aarch64_architecture_version;
/* The processor for which instructions should be scheduled. */
enum aarch64_processor aarch64_tune = cortexa53;
......@@ -348,6 +351,7 @@ struct processor
const char *const name;
enum aarch64_processor core;
const char *arch;
unsigned architecture_version;
const unsigned long flags;
const struct tune_params *const tune;
};
......@@ -356,21 +360,23 @@ struct processor
static const struct processor all_cores[] =
{
#define AARCH64_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \
{NAME, IDENT, #ARCH, FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings},
{NAME, IDENT, #ARCH, ARCH,\
FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings},
#include "aarch64-cores.def"
#undef AARCH64_CORE
{"generic", cortexa53, "8", AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings},
{NULL, aarch64_none, NULL, 0, NULL}
{"generic", cortexa53, "8", 8,\
AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings},
{NULL, aarch64_none, NULL, 0, 0, NULL}
};
/* Architectures implementing AArch64. */
static const struct processor all_architectures[] =
{
#define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \
{NAME, CORE, #ARCH, FLAGS, NULL},
{NAME, CORE, #ARCH, ARCH, FLAGS, NULL},
#include "aarch64-arches.def"
#undef AARCH64_ARCH
{NULL, aarch64_none, NULL, 0, NULL}
{NULL, aarch64_none, NULL, 0, 0, NULL}
};
/* Target specification. These are populated as commandline arguments
......@@ -6470,6 +6476,7 @@ aarch64_override_options (void)
aarch64_tune_flags = selected_tune->flags;
aarch64_tune = selected_tune->core;
aarch64_tune_params = selected_tune->tune;
aarch64_architecture_version = selected_cpu->architecture_version;
if (aarch64_fix_a53_err835769 == 2)
{
......
gcc/config/aarch64/aarch64.h
......@@ -28,7 +28,13 @@
{ \
builtin_define ("__aarch64__"); \
builtin_define ("__ARM_64BIT_STATE"); \
builtin_define_with_int_value \
("__ARM_ARCH", aarch64_architecture_version); \
cpp_define_formatted \
(parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version); \
builtin_define ("__ARM_ARCH_ISA_A64"); \
builtin_define_with_int_value \
("__ARM_ARCH_PROFILE", 'A'); \
builtin_define ("__ARM_FEATURE_CLZ"); \
builtin_define ("__ARM_FEATURE_IDIV"); \
builtin_define ("__ARM_FEATURE_UNALIGNED"); \
......@@ -172,6 +178,8 @@
#define PCC_BITFIELD_TYPE_MATTERS 1
/* Major revision number of the ARM Architecture implemented by the target. */
extern unsigned aarch64_architecture_version;
/* Instruction tuning/selection flags. */
......
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