Commit 0ba1b2ff by Alan Modra Committed by Alan Modra

rs6000-protos.h (mask_operand_wrap): Declare.

	* config/rs6000/rs6000-protos.h (mask_operand_wrap): Declare.
	(mask64_2_operand): Declare.
	(build_mask64_2_operands): Declare.
	(and64_2_operand): Declare.
	(extract_MB): Declare.
	(extract_ME): Declare.
	* config/rs6000/rs6000.c (mask64_operand): Allow all ones.  Remove
	CONST_DOUBLE code.
	(mask_operand_wrap): New insn predicate.
	(mask64_2_operand): Likewise.
	(and64_2_operand): Likewise.
	(build_mask64_2_operands): New function.
	(extract_MB): New function.
	(extract_ME): New function.
	(print_operand <case m,M>): Use extract_MB and extract_ME.
	(print_operand <case S>): Allow all ones.  Remove CONST_DOUBLE support.
	* config/rs6000/rs6000.h (EXTRA_CONSTRAINT): Add 't'.
	(PREDICATE_CODES): Add and64_2_operand, mask_operand_wrap and
	mask64_2_operand.  Remove CONST_DOUBLE from mask64_operand.
	* config/rs6000/rs6000.md (andsi3_internal3): New
	(andsi3_internal3+1): Enable split for powerpc64.
	(andsi3_internal3+2): New split.
	(andsi3_internal4): Renamed old andsi3_internal3.
	(andsi3_internal5): New.
	(andsi3_internal5+1): Enable split for powerpc64.
	(andsi3_internal5+2): New split.
	(andsi3_internal6, andsi3_internal7, andsi3_internal8): New.
	(anddi3): Handle 't' constraint.
	(anddi3+1): New split.
	(anddi3_internal2): Handle 't' constraint.
	(anddi3_internal2+1): New split.
	(anddi3_internal3): Handle 't' constraint.
	(anddi3_internal3+1): New split.

From-SVN: r55701
parent 95630163
2002-07-24 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000-protos.h (mask_operand_wrap): Declare.
(mask64_2_operand): Declare.
(build_mask64_2_operands): Declare.
(and64_2_operand): Declare.
(extract_MB): Declare.
(extract_ME): Declare.
* config/rs6000/rs6000.c (mask64_operand): Allow all ones. Remove
CONST_DOUBLE code.
(mask_operand_wrap): New insn predicate.
(mask64_2_operand): Likewise.
(and64_2_operand): Likewise.
(build_mask64_2_operands): New function.
(extract_MB): New function.
(extract_ME): New function.
(print_operand <case m,M>): Use extract_MB and extract_ME.
(print_operand <case S>): Allow all ones. Remove CONST_DOUBLE support.
* config/rs6000/rs6000.h (EXTRA_CONSTRAINT): Add 't'.
(PREDICATE_CODES): Add and64_2_operand, mask_operand_wrap and
mask64_2_operand. Remove CONST_DOUBLE from mask64_operand.
* config/rs6000/rs6000.md (andsi3_internal3): New
(andsi3_internal3+1): Enable split for powerpc64.
(andsi3_internal3+2): New split.
(andsi3_internal4): Renamed old andsi3_internal3.
(andsi3_internal5): New.
(andsi3_internal5+1): Enable split for powerpc64.
(andsi3_internal5+2): New split.
(andsi3_internal6, andsi3_internal7, andsi3_internal8): New.
(anddi3): Handle 't' constraint.
(anddi3+1): New split.
(anddi3_internal2): Handle 't' constraint.
(anddi3_internal2+1): New split.
(anddi3_internal3): Handle 't' constraint.
(anddi3_internal3+1): New split.
2002-07-24 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.md: Remove scratch reg on insns using
addze and similar (plus (comparison r1 r2) r3) insns. Add
missing scratch reg in one case. Formatting fixes.
......
......@@ -64,8 +64,12 @@ extern int non_add_cint_operand PARAMS ((rtx, enum machine_mode));
extern int non_logical_cint_operand PARAMS ((rtx, enum machine_mode));
extern int logical_operand PARAMS ((rtx, enum machine_mode));
extern int mask_operand PARAMS ((rtx, enum machine_mode));
extern int mask_operand_wrap PARAMS ((rtx, enum machine_mode));
extern int mask64_operand PARAMS ((rtx, enum machine_mode));
extern int mask64_2_operand PARAMS ((rtx, enum machine_mode));
extern void build_mask64_2_operands PARAMS ((rtx, rtx *));
extern int and64_operand PARAMS ((rtx, enum machine_mode));
extern int and64_2_operand PARAMS ((rtx, enum machine_mode));
extern int and_operand PARAMS ((rtx, enum machine_mode));
extern int count_register_operand PARAMS ((rtx, enum machine_mode));
extern int xer_operand PARAMS ((rtx, enum machine_mode));
......@@ -98,6 +102,8 @@ extern int addrs_ok_for_quad_peep PARAMS ((rtx, rtx));
extern enum reg_class secondary_reload_class PARAMS ((enum reg_class,
enum machine_mode, rtx));
extern int ccr_bit PARAMS ((rtx, int));
extern int extract_MB PARAMS ((rtx));
extern int extract_ME PARAMS ((rtx));
extern void print_operand PARAMS ((FILE *, rtx, int));
extern void print_operand_address PARAMS ((FILE *, rtx));
extern enum rtx_code rs6000_reverse_condition PARAMS ((enum machine_mode,
......
......@@ -1178,7 +1178,8 @@ enum reg_class
'R' is for AIX TOC entries.
'S' is a constant that can be placed into a 64-bit mask operand
'T' is a constant that can be placed into a 32-bit mask operand
'U' is for V.4 small data references. */
'U' is for V.4 small data references.
't' is for AND masks that can be performed by two rldic{l,r} insns. */
#define EXTRA_CONSTRAINT(OP, C) \
((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
......@@ -1187,6 +1188,10 @@ enum reg_class
: (C) == 'T' ? mask_operand (OP, SImode) \
: (C) == 'U' ? (DEFAULT_ABI == ABI_V4 \
&& small_data_operand (OP, GET_MODE (OP))) \
: (C) == 't' ? (mask64_2_operand (OP, DImode) \
&& (fixed_regs[CR0_REGNO] \
|| !logical_operand (OP, DImode)) \
&& !mask64_operand (OP, DImode)) \
: 0)
/* Given an rtx X being reloaded into a reg required to be
......@@ -2749,10 +2754,13 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
{"non_add_cint_operand", {CONST_INT}}, \
{"and_operand", {SUBREG, REG, CONST_INT}}, \
{"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"and64_2_operand", {SUBREG, REG, CONST_INT}}, \
{"logical_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"non_logical_cint_operand", {CONST_INT, CONST_DOUBLE}}, \
{"mask_operand", {CONST_INT}}, \
{"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \
{"mask_operand_wrap", {CONST_INT}}, \
{"mask64_operand", {CONST_INT}}, \
{"mask64_2_operand", {CONST_INT}}, \
{"count_register_operand", {REG}}, \
{"xer_operand", {REG}}, \
{"symbol_ref_operand", {SYMBOL_REF}}, \
......
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