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riscv-gcc-1
Commit 0ad91047 by David Edelsohn Committed by David Edelsohn
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rs6000.md (arithmetic, [...]): Disable patterns performing SImode comparisons… 

rs6000.md (arithmetic, [...]): Disable patterns performing SImode comparisons with SImode values if...

	* rs6000.md (arithmetic, logical, and shift Rc combiner patterns):
	Disable patterns performing SImode comparisons with SImode values
	if TARGET_POWERPC64 and instruction does not sign-extend or does
	not mask to narrower than SImode, i.e. where bit 31 and bit 63 may
	differ for signed quantities.
	(indirect_jump): Add expander to choose RTL based on TARGET_64BIT.
	(tablejump): Patterns contingent on TARGET_64BIT not TARGET_POWERPC64.
	(decrement_and_branch_on_count): Add 64-bit variant.

From-SVN: r28172
parent 9608c091
Showing with 11 additions and 0 deletions
gcc/ChangeLog
Mon Jul 19 15:09:29 1999 David Edelsohn <edelsohn@gnu.org>
* rs6000.md (arithmetic, logical, and shift Rc combiner patterns):
Disable patterns performing SImode comparisons with SImode values
if TARGET_POWERPC64 and instruction does not sign-extend or does
not mask to narrower than SImode, i.e. where bit 31 and bit 63 may
differ for signed quantities.
(indirect_jump): Add expander to choose RTL based on TARGET_64BIT.
(tablejump): Patterns contingent on TARGET_64BIT not TARGET_POWERPC64.
(decrement_and_branch_on_count): Add 64-bit variant.
Mon Jul 19 09:36:27 1999 Bernd Schmidt <bernds@cygnus.co.uk>
* final.c (output_asm_insn): When searching for the matching string
......
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