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lvzhengyang
riscv-gcc-1
Commits
0a81f500
Commit
0a81f500
authored
Oct 02, 1994
by
Richard Earnshaw
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Plain Diff
(arm_reload_in_hi): New function.
From-SVN: r8201
parent
2ce9c1b9
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1 changed file
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31 additions
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2 deletions
+31
-2
gcc/config/arm/arm.c
+31
-2
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gcc/config/arm/arm.c
View file @
0a81f500
...
@@ -1472,8 +1472,8 @@ store_multiple_operation (op, mode)
...
@@ -1472,8 +1472,8 @@ store_multiple_operation (op, mode)
int
int
multi_register_push
(
op
,
mode
)
multi_register_push
(
op
,
mode
)
rtx
op
;
rtx
op
;
enum
machine_mode
mode
;
enum
machine_mode
mode
;
{
{
if
(
GET_CODE
(
op
)
!=
PARALLEL
if
(
GET_CODE
(
op
)
!=
PARALLEL
||
(
GET_CODE
(
XVECEXP
(
op
,
0
,
0
))
!=
SET
)
||
(
GET_CODE
(
XVECEXP
(
op
,
0
,
0
))
!=
SET
)
...
@@ -1714,6 +1714,35 @@ gen_compare_reg (code, x, y, fp)
...
@@ -1714,6 +1714,35 @@ gen_compare_reg (code, x, y, fp)
}
}
void
void
arm_reload_in_hi
(
operands
)
rtx
*
operands
;
{
rtx
base
=
find_replacement
(
&
XEXP
(
operands
[
1
],
0
));
emit_insn
(
gen_zero_extendqisi2
(
operands
[
2
],
gen_rtx
(
MEM
,
QImode
,
base
)));
emit_insn
(
gen_zero_extendqisi2
(
gen_rtx
(
SUBREG
,
SImode
,
operands
[
0
],
0
),
gen_rtx
(
MEM
,
QImode
,
plus_constant
(
base
,
1
))));
if
(
BYTES_BIG_ENDIAN
)
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
gen_rtx
(
SUBREG
,
SImode
,
operands
[
0
],
0
),
gen_rtx
(
IOR
,
SImode
,
gen_rtx
(
ASHIFT
,
SImode
,
gen_rtx
(
SUBREG
,
SImode
,
operands
[
0
],
0
),
GEN_INT
(
8
)),
operands
[
2
])));
else
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
gen_rtx
(
SUBREG
,
SImode
,
operands
[
0
],
0
),
gen_rtx
(
IOR
,
SImode
,
gen_rtx
(
ASHIFT
,
SImode
,
operands
[
2
],
GEN_INT
(
8
)),
gen_rtx
(
SUBREG
,
SImode
,
operands
[
0
],
0
))));
}
void
arm_reload_out_hi
(
operands
)
arm_reload_out_hi
(
operands
)
rtx
*
operands
;
rtx
*
operands
;
{
{
...
...
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