Commit 0a67ef4c by Michael Collison Committed by Michael Collison

re PR target/70014 ([ARM] Predicate does not match constraint (*subsi3_carryin_const))

2016-03-03  Michael Collison  <michael.collison@linaro.org>

	PR target/70014
	* config/arm/arm.md (*subsi3_carryin_const): Change predicate
	for operand 1 to s_register_operand. Change predicate for operand
	2 to arm_not_immediate_operand.

From-SVN: r233927
parent 5147e0e8
2016-03-03 Michael Collison <michael.collison@linaro.org>
PR target/70014
* config/arm/arm.md (*subsi3_carryin_const): Change predicate
for operand 1 to s_register_operand. Change predicate for operand
2 to arm_not_immediate_operand.
2016-03-02 H.J. Lu <hongjiu.lu@intel.com> 2016-03-02 H.J. Lu <hongjiu.lu@intel.com>
* doc/tm.texi: Regenerated. * doc/tm.texi: Regenerated.
......
...@@ -883,8 +883,8 @@ ...@@ -883,8 +883,8 @@
(define_insn "*subsi3_carryin_const" (define_insn "*subsi3_carryin_const"
[(set (match_operand:SI 0 "s_register_operand" "=r") [(set (match_operand:SI 0 "s_register_operand" "=r")
(minus:SI (plus:SI (match_operand:SI 1 "reg_or_int_operand" "r") (minus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "r")
(match_operand:SI 2 "arm_not_operand" "K")) (match_operand:SI 2 "arm_not_immediate_operand" "K"))
(ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
"TARGET_32BIT" "TARGET_32BIT"
"sbc\\t%0, %1, #%B2" "sbc\\t%0, %1, #%B2"
......
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