Commit 09522f21 by Franz Sirl Committed by Jeff Law

reload1.c (gen_reload): When synthesizing a 3 operand add sequence...

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        * reload1.c (gen_reload): When synthesizing a 3 operand add
        sequence, improve test for when to reload OP1 into the reload
        register instead of OP0.

From-SVN: r27987
parent 301e0aaa
Wed Jul 7 02:00:04 1999 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
* reload1.c (gen_reload): When synthesizing a 3 operand add
sequence, improve test for when to reload OP1 into the reload
register instead of OP0.
Wed Jul 7 01:38:03 1999 Jim Wilson <wilson@cygnus.com> Wed Jul 7 01:38:03 1999 Jim Wilson <wilson@cygnus.com>
* unroll.c (unroll_loop): Don't delete NOTE_INSN_DELETED_LABEL notes. * unroll.c (unroll_loop): Don't delete NOTE_INSN_DELETED_LABEL notes.
......
...@@ -7811,17 +7811,27 @@ gen_reload (out, in, opnum, type) ...@@ -7811,17 +7811,27 @@ gen_reload (out, in, opnum, type)
delete_insns_since (last); delete_insns_since (last);
/* If that failed, we must use a conservative two-insn sequence. /* If that failed, we must use a conservative two-insn sequence.
use move to copy constant, MEM, or pseudo register to the reload
register since "move" will be able to handle an arbitrary operand, Use a move to copy one operand into the reload register. Prefer
unlike add which can't, in general. Then add the registers. to reload a constant, MEM or pseudo since the move patterns can
handle an arbitrary operand. If OP1 is not a constant, MEM or
pseudo and OP1 is not a valid operand for an add instruction, then
reload OP1.
After reloading one of the operands into the reload register, add
the reload register to the output register.
If there is another way to do this for a specific machine, a If there is another way to do this for a specific machine, a
DEFINE_PEEPHOLE should be specified that recognizes the sequence DEFINE_PEEPHOLE should be specified that recognizes the sequence
we emit below. */ we emit below. */
code = (int) add_optab->handlers[(int) GET_MODE (out)].insn_code;
if (CONSTANT_P (op1) || GET_CODE (op1) == MEM || GET_CODE (op1) == SUBREG if (CONSTANT_P (op1) || GET_CODE (op1) == MEM || GET_CODE (op1) == SUBREG
|| (GET_CODE (op1) == REG || (GET_CODE (op1) == REG
&& REGNO (op1) >= FIRST_PSEUDO_REGISTER)) && REGNO (op1) >= FIRST_PSEUDO_REGISTER)
|| (code != CODE_FOR_nothing
&& ! (*insn_operand_predicate[code][2]) (op1, insn_operand_mode[code][2])))
tem = op0, op0 = op1, op1 = tem; tem = op0, op0 = op1, op1 = tem;
gen_reload (out, op0, opnum, type); gen_reload (out, op0, opnum, type);
......
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