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Commit 094e84fa by Richard Sandiford Committed by Richard Sandiford
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frv.md (UNSPEC_MASACCS, [...]): New constants. 

	* config/frv/frv.md (UNSPEC_MASACCS, UNSPEC_MDASACCS): New constants.
	(maddaccs, msubaccs, *maddacc): Turn operand 0 into a single ACC/ACCG
	pair.  Remove match_dup from inputs.  Remove masaccs handling.
	(mdaddaccs, mdsubaccs, *mdaddacc): Likewise a dual ACC/ACCG pair.
	(masaccs, mdasaccs): Turn into define_insns.

From-SVN: r87299
parent d635c707
Showing with 63 additions and 69 deletions
gcc/ChangeLog
2004-09-10 Richard Sandiford <rsandifo@redhat.com> 2004-09-10 Richard Sandiford <rsandifo@redhat.com>
* config/frv/frv.md (UNSPEC_MASACCS, UNSPEC_MDASACCS): New constants.
(maddaccs, msubaccs, *maddacc): Turn operand 0 into a single ACC/ACCG
pair. Remove match_dup from inputs. Remove masaccs handling.
(mdaddaccs, mdsubaccs, *mdaddacc): Likewise a dual ACC/ACCG pair.
(masaccs, mdasaccs): Turn into define_insns.
2004-09-10 Richard Sandiford <rsandifo@redhat.com>
* tree-tailcall.c (process_assignment): Only do accumulator transforms * tree-tailcall.c (process_assignment): Only do accumulator transforms
for floating-point types if flag_unsafe_math_optimizations. for floating-point types if flag_unsafe_math_optimizations.
......
gcc/config/frv/frv.md
...@@ -6208,6 +6208,8 @@ ...@@ -6208,6 +6208,8 @@
(UNSPEC_MQLMTHS 155) (UNSPEC_MQLMTHS 155)
(UNSPEC_MQSLLHI 156) (UNSPEC_MQSLLHI 156)
(UNSPEC_MQSRAHI 157) (UNSPEC_MQSRAHI 157)
(UNSPEC_MASACCS 158)
(UNSPEC_MDASACCS 159)
]) ])
;; Logic operations: type "mlogic" ;; Logic operations: type "mlogic"
...@@ -7726,52 +7728,45 @@ ...@@ -7726,52 +7728,45 @@
;; Accumulator addition/subtraction: type "maddacc" ;; Accumulator addition/subtraction: type "maddacc"
(define_expand "maddaccs" (define_expand "maddaccs"
[(parallel [(set (match_operand:DI 0 "even_acc_operand" "") [(parallel [(set (match_operand:SI 0 "acc_operand" "")
(unspec:DI [(match_dup 0) (unspec:SI [(match_operand:DI 1 "even_acc_operand" "")]
(match_operand:DI 1 "even_acc_operand" "")]
UNSPEC_MADDACC)) UNSPEC_MADDACC))
(set (match_operand:HI 2 "accg_operand" "") (set (match_operand:QI 2 "accg_operand" "")
(unspec:HI [(match_dup 2) (unspec:QI [(match_operand:HI 3 "accg_operand" "")
(match_operand:HI 3 "accg_operand" "")
(match_dup 4)] (match_dup 4)]
UNSPEC_MADDACC))])] UNSPEC_MADDACC))])]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"operands[4] = GEN_INT (FRV_BUILTIN_MADDACCS);") "operands[4] = GEN_INT (FRV_BUILTIN_MADDACCS);")
(define_expand "msubaccs" (define_expand "msubaccs"
[(parallel [(set (match_operand:DI 0 "even_acc_operand" "") [(parallel [(set (match_operand:SI 0 "acc_operand" "")
(unspec:DI [(match_dup 0) (unspec:SI [(match_operand:DI 1 "even_acc_operand" "")]
(match_operand:DI 1 "even_acc_operand" "")]
UNSPEC_MADDACC)) UNSPEC_MADDACC))
(set (match_operand:HI 2 "accg_operand" "") (set (match_operand:QI 2 "accg_operand" "")
(unspec:HI [(match_dup 2) (unspec:QI [(match_operand:HI 3 "accg_operand" "")
(match_operand:HI 3 "accg_operand" "")
(match_dup 4)] (match_dup 4)]
UNSPEC_MADDACC))])] UNSPEC_MADDACC))])]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"operands[4] = GEN_INT (FRV_BUILTIN_MSUBACCS);") "operands[4] = GEN_INT (FRV_BUILTIN_MSUBACCS);")
(define_expand "masaccs" (define_insn "masaccs"
[(parallel [(set (match_operand:DI 0 "even_acc_operand" "") [(set (match_operand:DI 0 "even_acc_operand" "=b")
(unspec:DI [(match_dup 0) (unspec:DI [(match_operand:DI 1 "even_acc_operand" "b")]
(match_operand:DI 1 "even_acc_operand" "")] UNSPEC_MASACCS))
UNSPEC_MADDACC)) (set (match_operand:HI 2 "accg_operand" "=B")
(set (match_operand:HI 2 "accg_operand" "") (unspec:HI [(match_operand:HI 3 "accg_operand" "B")]
(unspec:HI [(match_dup 2) UNSPEC_MASACCS))]
(match_operand:HI 3 "accg_operand" "")
(match_dup 4)]
UNSPEC_MADDACC))])]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"operands[4] = GEN_INT (FRV_BUILTIN_MASACCS);") "masaccs %1, %0"
[(set_attr "length" "4")
(set_attr "type" "maddacc")])
(define_insn "*maddacc" (define_insn "*maddacc"
[(set (match_operand:DI 0 "even_acc_operand" "+b") [(set (match_operand:SI 0 "acc_operand" "=a")
(unspec:DI [(match_dup 0) (unspec:SI [(match_operand:DI 1 "even_acc_operand" "b")]
(match_operand:DI 1 "even_acc_operand" "b")]
UNSPEC_MADDACC)) UNSPEC_MADDACC))
(set (match_operand:HI 2 "accg_operand" "+B") (set (match_operand:QI 2 "accg_operand" "=B")
(unspec:HI [(match_dup 2) (unspec:QI [(match_operand:HI 3 "accg_operand" "B")
(match_operand:HI 3 "accg_operand" "B")
(match_operand:SI 4 "const_int_operand" "n")] (match_operand:SI 4 "const_int_operand" "n")]
UNSPEC_MADDACC))] UNSPEC_MADDACC))]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
...@@ -7782,7 +7777,6 @@ ...@@ -7782,7 +7777,6 @@
default: break; default: break;
case FRV_BUILTIN_MADDACCS: return \"maddaccs %1, %0\"; case FRV_BUILTIN_MADDACCS: return \"maddaccs %1, %0\";
case FRV_BUILTIN_MSUBACCS: return \"msubaccs %1, %0\"; case FRV_BUILTIN_MSUBACCS: return \"msubaccs %1, %0\";
case FRV_BUILTIN_MASACCS: return \"masaccs %1, %0\";
} }
fatal_insn (\"Bad media insn, maddacc\", insn); fatal_insn (\"Bad media insn, maddacc\", insn);
...@@ -7793,54 +7787,47 @@ ...@@ -7793,54 +7787,47 @@
;; Dual accumulator addition/subtraction: type "mdaddacc" ;; Dual accumulator addition/subtraction: type "mdaddacc"
(define_expand "mdaddaccs" (define_expand "mdaddaccs"
[(parallel [(set (match_operand:V4SI 0 "quad_acc_operand" "") [(parallel [(set (match_operand:DI 0 "even_acc_operand" "")
(unspec:V4SI [(match_dup 0) (unspec:DI [(match_operand:V4SI 1 "quad_acc_operand" "")]
(match_operand:V4SI 1 "quad_acc_operand" "")] UNSPEC_MDADDACC))
UNSPEC_MDADDACC)) (set (match_operand:HI 2 "accg_operand" "")
(set (match_operand:V4QI 2 "accg_operand" "") (unspec:HI [(match_operand:V4QI 3 "accg_operand" "")
(unspec:V4QI [(match_dup 2) (match_dup 4)]
(match_operand:V4QI 3 "accg_operand" "") UNSPEC_MDADDACC))])]
(match_dup 4)]
UNSPEC_MDADDACC))])]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"operands[4] = GEN_INT (FRV_BUILTIN_MDADDACCS);") "operands[4] = GEN_INT (FRV_BUILTIN_MDADDACCS);")
(define_expand "mdsubaccs" (define_expand "mdsubaccs"
[(parallel [(set (match_operand:V4SI 0 "quad_acc_operand" "") [(parallel [(set (match_operand:DI 0 "even_acc_operand" "")
(unspec:V4SI [(match_dup 0) (unspec:DI [(match_operand:V4SI 1 "quad_acc_operand" "")]
(match_operand:V4SI 1 "quad_acc_operand" "")] UNSPEC_MDADDACC))
UNSPEC_MDADDACC)) (set (match_operand:HI 2 "accg_operand" "")
(set (match_operand:V4QI 2 "accg_operand" "") (unspec:HI [(match_operand:V4QI 3 "accg_operand" "")
(unspec:V4QI [(match_dup 2) (match_dup 4)]
(match_operand:V4QI 3 "accg_operand" "") UNSPEC_MDADDACC))])]
(match_dup 4)]
UNSPEC_MDADDACC))])]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"operands[4] = GEN_INT (FRV_BUILTIN_MDSUBACCS);") "operands[4] = GEN_INT (FRV_BUILTIN_MDSUBACCS);")
(define_expand "mdasaccs" (define_insn "mdasaccs"
[(parallel [(set (match_operand:V4SI 0 "quad_acc_operand" "") [(set (match_operand:V4SI 0 "quad_acc_operand" "=A")
(unspec:V4SI [(match_dup 0) (unspec:V4SI [(match_operand:V4SI 1 "quad_acc_operand" "A")]
(match_operand:V4SI 1 "quad_acc_operand" "")] UNSPEC_MDASACCS))
UNSPEC_MDADDACC)) (set (match_operand:V4QI 2 "accg_operand" "=B")
(set (match_operand:V4QI 2 "accg_operand" "") (unspec:V4QI [(match_operand:V4QI 3 "accg_operand" "B")]
(unspec:V4QI [(match_dup 2) UNSPEC_MDASACCS))]
(match_operand:V4QI 3 "accg_operand" "")
(match_dup 4)]
UNSPEC_MDADDACC))])]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"operands[4] = GEN_INT (FRV_BUILTIN_MDASACCS);") "mdasaccs %1, %0"
[(set_attr "length" "4")
(set_attr "type" "mdaddacc")])
(define_insn "*mdaddacc" (define_insn "*mdaddacc"
[(set (match_operand:V4SI 0 "quad_acc_operand" "+A") [(set (match_operand:DI 0 "even_acc_operand" "=b")
(unspec:V4SI [(match_dup 0) (unspec:DI [(match_operand:V4SI 1 "quad_acc_operand" "A")]
(match_operand:V4SI 1 "quad_acc_operand" "A")] UNSPEC_MDADDACC))
UNSPEC_MDADDACC)) (set (match_operand:HI 2 "accg_operand" "=B")
(set (match_operand:V4QI 2 "accg_operand" "+B") (unspec:HI [(match_operand:V4QI 3 "accg_operand" "B")
(unspec:V4QI [(match_dup 2) (match_operand:SI 4 "const_int_operand" "n")]
(match_operand:V4QI 3 "accg_operand" "B") UNSPEC_MDADDACC))]
(match_operand:SI 4 "const_int_operand" "n")]
UNSPEC_MDADDACC))]
"TARGET_MEDIA_REV2" "TARGET_MEDIA_REV2"
"* "*
{ {
...@@ -7849,7 +7836,6 @@ ...@@ -7849,7 +7836,6 @@
default: break; default: break;
case FRV_BUILTIN_MDADDACCS: return \"mdaddaccs %1, %0\"; case FRV_BUILTIN_MDADDACCS: return \"mdaddaccs %1, %0\";
case FRV_BUILTIN_MDSUBACCS: return \"mdsubaccs %1, %0\"; case FRV_BUILTIN_MDSUBACCS: return \"mdsubaccs %1, %0\";
case FRV_BUILTIN_MDASACCS: return \"mdasaccs %1, %0\";
} }
fatal_insn (\"Bad media insn, mdaddacc\", insn); fatal_insn (\"Bad media insn, mdaddacc\", insn);
......
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