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riscv-gcc-1
Commit 09026fe4 by Richard Kenner
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(mov{si,sf,df}cc): Call gen_compare_reg to generate the condition code 

register.

From-SVN: r10097
parent 9cc883e0
Showing with 6 additions and 9 deletions
gcc/config/arm/arm.md
......@@ -3323,9 +3323,8 @@
"
{
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg = gen_rtx (REG,
SELECT_CC_MODE (code, arm_compare_op0, arm_compare_op1),
CC_REGNUM);
rtx ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
arm_compare_fp);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
}")
......@@ -3339,9 +3338,8 @@
"
{
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg = gen_rtx (REG,
SELECT_CC_MODE (code, arm_compare_op0, arm_compare_op1),
CC_REGNUM);
rtx ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
arm_compare_fp);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
}")
......@@ -3355,9 +3353,8 @@
"
{
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg = gen_rtx (REG,
SELECT_CC_MODE (code, arm_compare_op0, arm_compare_op1),
CC_REGNUM);
rtx ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
arm_compare_fp);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
}")
......
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