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riscv-gcc-1
Commit 08a5aaa2 by Adrian Straetling Committed by Ulrich Weigand
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s390.md ("*tstdi_extimm", [...]): Merge. 

2005-12-14  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.md ("*tstdi_extimm", "*tstsi_extimm"): Merge.
	("*tstdi_cconly_extimm", "*tstsi_cconly_extimm"): Merge.
	("*tstdi_cconly2", "*tstsi_cconly2"): Merge.
	Move other tst* patterns to retain partial order.

From-SVN: r108517
parent 1b48c8cc
Showing with 43 additions and 61 deletions
gcc/ChangeLog
2005-12-14 Adrian Straetling <straetling@de.ibm.com> 2005-12-14 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md ("*tstdi_extimm", "*tstsi_extimm"): Merge.
("*tstdi_cconly_extimm", "*tstsi_cconly_extimm"): Merge.
("*tstdi_cconly2", "*tstsi_cconly2"): Merge.
Move other tst* patterns to retain partial order.
2005-12-14 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md ("d0", "1"): New mode attributes. * config/s390/s390.md ("d0", "1"): New mode attributes.
("<shift>di3", "<shift>si3"): Merge. ("<shift>di3", "<shift>si3"): Merge.
("*<shift>di3_and", "*<shift>si3_and"): Merge. ("*<shift>di3_and", "*<shift>si3_and"): Merge.
......
gcc/config/s390/s390.md
...@@ -430,7 +430,11 @@ ...@@ -430,7 +430,11 @@
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
;
; Load-and-Test instructions ; Load-and-Test instructions
;
; tst(di|si) intruction pattern(s).
(define_insn "*tstdi_sign" (define_insn "*tstdi_sign"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
...@@ -443,28 +447,28 @@ ...@@ -443,28 +447,28 @@
"ltgfr\t%2,%0" "ltgfr\t%2,%0"
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*tstdi_extimm" (define_insn "*tst<mode>_extimm"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "nonimmediate_operand" "d,m") (compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
(match_operand:DI 1 "const0_operand" ""))) (match_operand:GPR 1 "const0_operand" "")))
(set (match_operand:DI 2 "register_operand" "=d,d") (set (match_operand:GPR 2 "register_operand" "=d,d")
(match_dup 0))] (match_dup 0))]
"s390_match_ccmode(insn, CCSmode) && TARGET_64BIT && TARGET_EXTIMM" "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@ "@
ltgr\t%2,%0 lt<g>r\t%2,%0
ltg\t%2,%0" lt<g>\t%2,%0"
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RR<E>,RXY")])
(define_insn "*tstdi_cconly_extimm" (define_insn "*tst<mode>_cconly_extimm"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "nonimmediate_operand" "d,m") (compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
(match_operand:DI 1 "const0_operand" ""))) (match_operand:GPR 1 "const0_operand" "")))
(clobber (match_scratch:DI 2 "=X,d"))] (clobber (match_scratch:GPR 2 "=X,d"))]
"s390_match_ccmode(insn, CCSmode) && TARGET_64BIT && TARGET_EXTIMM" "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@ "@
ltgr\t%0,%0 lt<g>r\t%0,%0
ltg\t%2,%0" lt<g>\t%2,%0"
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RR<E>,RXY")])
(define_insn "*tstdi" (define_insn "*tstdi"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
...@@ -476,46 +480,6 @@ ...@@ -476,46 +480,6 @@
"ltgr\t%2,%0" "ltgr\t%2,%0"
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*tstdi_cconly"
[(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_64BIT"
"ltgr\t%0,%0"
[(set_attr "op_type" "RRE")])
(define_insn "*tstdi_cconly_31"
[(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && !TARGET_64BIT"
"srda\t%0,0"
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
(define_insn "*tstsi_extimm"
[(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,m")
(match_operand:SI 1 "const0_operand" "")))
(set (match_operand:SI 2 "register_operand" "=d,d")
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@
ltr\t%2,%0
lt\t%2,%0"
[(set_attr "op_type" "RR,RXY")])
(define_insn "*tstsi_cconly_extimm"
[(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,m")
(match_operand:SI 1 "const0_operand" "")))
(clobber (match_scratch:SI 2 "=X,d"))]
"s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@
ltr\t%0,%0
lt\t%2,%0"
[(set_attr "op_type" "RR,RXY")])
(define_insn "*tstsi" (define_insn "*tstsi"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S") (compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S")
...@@ -541,13 +505,24 @@ ...@@ -541,13 +505,24 @@
icmy\t%2,15,%S0" icmy\t%2,15,%S0"
[(set_attr "op_type" "RR,RS,RSY")]) [(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly2" (define_insn "*tstdi_cconly_31"
[(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && !TARGET_64BIT"
"srda\t%0,0"
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
(define_insn "*tst<mode>_cconly2"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "register_operand" "d") (compare (match_operand:GPR 0 "register_operand" "d")
(match_operand:SI 1 "const0_operand" "")))] (match_operand:GPR 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode)" "s390_match_ccmode(insn, CCSmode)"
"ltr\t%0,%0" "lt<g>r\t%0,%0"
[(set_attr "op_type" "RR")]) [(set_attr "op_type" "RR<E>")])
; tst(hi|qi) intruction pattern(s).
(define_insn "*tst<mode>CCT" (define_insn "*tst<mode>CCT"
[(set (reg CC_REGNUM) [(set (reg CC_REGNUM)
......
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