Skip to content

R
riscv-gcc-1
Commit 0864bfc2 by Ganesh Gopalasubramanian Committed by Ganesh Gopalasubramanian
Options

AMD specific default alignment changes 

From-SVN: r198820
parent 640bfeb2
Showing with 10 additions and 5 deletions
gcc/ChangeLog
2013-05-13 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
* config/i386/i386.c (processor_target_table): Modified default
alignment values for AMD BD and BT architectures.
2013-05-13 Marc Glisse <marc.glisse@inria.fr>
* tree-vect-generic.c (uniform_vector_p): Move ...
......
gcc/config/i386/i386.c
......@@ -2453,11 +2453,11 @@ static const struct ptt processor_target_table[PROCESSOR_max] =
{&generic32_cost, 16, 7, 16, 7, 16},
{&generic64_cost, 16, 10, 16, 10, 16},
{&amdfam10_cost, 32, 24, 32, 7, 32},
{&bdver1_cost, 32, 24, 32, 7, 32},
{&bdver2_cost, 32, 24, 32, 7, 32},
{&bdver3_cost, 32, 24, 32, 7, 32},
{&btver1_cost, 32, 24, 32, 7, 32},
{&btver2_cost, 32, 24, 32, 7, 32},
{&bdver1_cost, 16, 10, 16, 7, 11},
{&bdver2_cost, 16, 10, 16, 7, 11},
{&bdver3_cost, 16, 10, 16, 7, 11},
{&btver1_cost, 16, 10, 16, 7, 11},
{&btver2_cost, 16, 10, 16, 7, 11},
{&atom_cost, 16, 15, 16, 7, 16}
};
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment