Commit 082cca25 by Richard Earnshaw Committed by Richard Earnshaw

vfp.md (arm_movsi_vfp): Hide VFP register classes from register preferencing.

* arm/vfp.md (arm_movsi_vfp): Hide VFP register classes from register
preferencing.

From-SVN: r92948
parent 1e156882
2004-01-05 Richard Earnshaw <rearnsha@arm.com>
* arm/vfp.md (arm_movsi_vfp): Hide VFP register classes from register
preferencing.
2004-01-05 Uros Bizjak <uros@kss-loka.si> 2004-01-05 Uros Bizjak <uros@kss-loka.si>
* doc/invoke.texi (Intel 386 and AMD x86-64 Options): * doc/invoke.texi (Intel 386 and AMD x86-64 Options):
......
...@@ -111,8 +111,8 @@ ...@@ -111,8 +111,8 @@
;; ??? For now do not allow loading constants into vfp regs. This causes ;; ??? For now do not allow loading constants into vfp regs. This causes
;; problems because small constants get converted into adds. ;; problems because small constants get converted into adds.
(define_insn "*arm_movsi_vfp" (define_insn "*arm_movsi_vfp"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,m,!w,r,!w,!w, Uv") [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,m,*w,r,*w,*w, *Uv")
(match_operand:SI 1 "general_operand" "rI,K,mi,r,r,!w,!w,Uvi,!w"))] (match_operand:SI 1 "general_operand" "rI,K,mi,r,r,*w,*w,*Uvi,*w"))]
"TARGET_ARM && TARGET_VFP && TARGET_HARD_FLOAT "TARGET_ARM && TARGET_VFP && TARGET_HARD_FLOAT
&& ( s_register_operand (operands[0], SImode) && ( s_register_operand (operands[0], SImode)
|| s_register_operand (operands[1], SImode))" || s_register_operand (operands[1], SImode))"
......
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