arm.c (thumb_base_register_rtx_p): Don't allow virtual registers as base…

arm.c (thumb_base_register_rtx_p): Don't allow virtual registers as base registers for sub-word operations.

* arm.c (thumb_base_register_rtx_p): Don't allow virtual registers
as base registers for sub-word operations.
(thumb_legitimate_address_p): Simplify REG+REG test.

From-SVN: r74739

gcc/ChangeLog

+2003-12-17  Richard Earnshaw  <rearnsha@arm.com>
+
+	* arm.c (thumb_base_register_rtx_p): Don't allow virtual registers
+	as base registers for sub-word operations.
+	(thumb_legitimate_address_p): Simplify REG+REG test.
+
 2003-12-17  Segher Boessenkool  <boessen@de.ibm.com>
 
 	* opts.c (wrap_help): Fix overflow.

gcc/config/arm/arm.c

@@ -2868,7 +2868,7 @@ arm_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p)
 	  && INTVAL (index) > -range);
 }
 
-/* Return nonzero if X is valid as an ARM state addressing register.  */
+/* Return nonzero if X is valid as an Thumb state base register.  */
 static int
 thumb_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p)
 {
@@ -2883,10 +2883,11 @@ thumb_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p)
     return THUMB_REGNO_MODE_OK_FOR_BASE_P (regno, mode);
 
   return (regno <= LAST_LO_REGNUM
-	  || regno >= FIRST_PSEUDO_REGISTER
+	  || regno > LAST_VIRTUAL_REGISTER
 	  || regno == FRAME_POINTER_REGNUM
 	  || (GET_MODE_SIZE (mode) >= 4
 	      && (regno == STACK_POINTER_REGNUM
+		  || x >= FIRST_PSEUDO_REGISTER
 		  || x == hard_frame_pointer_rtx
 		  || x == arg_pointer_rtx)));
 }
@@ -2963,8 +2964,6 @@ thumb_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p)
       if (GET_MODE_SIZE (mode) <= 4
 	  && XEXP (x, 0) != frame_pointer_rtx
 	  && XEXP (x, 1) != frame_pointer_rtx
-	  && XEXP (x, 0) != virtual_stack_vars_rtx
-	  && XEXP (x, 1) != virtual_stack_vars_rtx
 	  && thumb_index_register_rtx_p (XEXP (x, 0), strict_p)
 	  && thumb_index_register_rtx_p (XEXP (x, 1), strict_p))
 	return 1;