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Commit 077dab3b by Hartmut Penner Committed by Hartmut Penner
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s390.c (s390_safe_attr_type): New function. 

        * config/s390/s390.c (s390_safe_attr_type): New function.
        (s390_use_dfa_pipeline_interface): New function, return true for z900.
        (s390_issue_rate): New function.
        (s390_agen_dep_p): New function.
        (addr_generation_dependency_p): Use 's390_safe_attr_type'.
        (s390_adjust_cost): Return 'cost' if new DFA is used.
        (s390_adjust_priority): Delete function.
        * config/s390/s390-protos.h: (s390_agen_dep_p): New prototype.
        * config/s390/s390.md (atype attribute): Attribute 'atype' default
        determined by 'op_type'.
        (type attribute): Added more type attributes.
        * config/s390/2064.md: New DFA description for z900 pipeline.

From-SVN: r61321
parent 2b28d405
Showing with 224 additions and 78 deletions
gcc/ChangeLog
2003-01-15 Hartmut Penner <hpenner@de.ibm.com>
* config/s390/s390.c (s390_safe_attr_type): New function.
(s390_use_dfa_pipeline_interface): New function, return true for z900.
(s390_issue_rate): New function.
(s390_agen_dep_p): New function.
(addr_generation_dependency_p): Use 's390_safe_attr_type'.
(s390_adjust_cost): Return 'cost' if new DFA is used.
(s390_adjust_priority): Delete function.
* config/s390/s390-protos.h: (s390_agen_dep_p): New prototype.
* config/s390/s390.md (atype attribute): Attribute 'atype' default
determined by 'op_type'.
(type attribute): Added more type attributes.
* config/s390/2064.md: New DFA description for z900 pipeline.
2003-01-15 Alexandre Oliva <aoliva@redhat.com>
* config/i386/i386.c (ix86_expand_vector_move): Validize constant
forced to memory. Fixes PR bootstrap/9036.
* config/mips/mips.h (CRT_CALL_STATIC_FUNCTION): Define so as
to set $gp before the call.
......
gcc/config/s390/2064.md 0 → 100644
;; Scheduling description for z900 (cpu 2064).
;; Copyright (C) 2002 Free Software Foundation, Inc.
;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and
;; Ulrich Weigand (uweigand@de.ibm.com).
;;
;; This file is part of GNU CC.
;;
;; GNU CC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 2, or (at your option)
;; any later version.
;;
;; GNU CC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GNU CC; see the file COPYING. If not, write to
;; the Free Software Foundation, 59 Temple Place - Suite 330,
;; Boston, MA 02111-1307, USA.
;;
;; References:
;; The microarchitecture of the IBM eServer z900 processor.
;; E.M. Schwarz et al.
;; IBM Journal of Research and Development Vol. 46 No 4/5, 2002.
;;
;; z900 (cpu 2064) pipeline
;;
;; dec
;; --> | <---
;; LA bypass | agen |
;; | | |
;; --- c1 | Load bypass
;; | |
;; c2----
;; |
;; e1
;; |
;; wr
(define_automaton "z_ipu")
(define_cpu_unit "z_e1" "z_ipu")
(define_cpu_unit "z_wr" "z_ipu")
(define_insn_reservation "z_la" 1
(and (eq_attr "cpu" "z900")
(eq_attr "type" "la"))
"z_e1,z_wr")
(define_insn_reservation "z_larl" 1
(and (eq_attr "cpu" "z900")
(eq_attr "type" "larl"))
"z_e1,z_wr")
(define_insn_reservation "z_load" 1
(and (eq_attr "cpu" "z900")
(eq_attr "type" "load"))
"z_e1,z_wr")
(define_insn_reservation "z_store" 1
(and (eq_attr "cpu" "z900")
(eq_attr "type" "store"))
"z_e1,z_wr")
(define_insn_reservation "z_call" 5
(and (eq_attr "cpu" "z900")
(eq_attr "type" "jsr"))
"z_e1*5,z_wr")
(define_insn_reservation "z_o2" 2
(and (eq_attr "cpu" "z900")
(eq_attr "type" "o2"))
"z_e1*2,z_wr")
(define_insn_reservation "z_o3" 3
(and (eq_attr "cpu" "z900")
(eq_attr "type" "o3"))
"z_e1*3,z_wr")
;
; Insn still not mentioned are check for
; the usage of the agen unit
;
(define_insn_reservation "z_int" 1
(and (eq_attr "cpu" "z900")
(eq_attr "atype" "reg"))
"z_e1,z_wr")
(define_insn_reservation "z_agen" 1
(and (eq_attr "cpu" "z900")
(eq_attr "atype" "agen"))
"z_e1,z_wr")
;;
;; s390_agen_dep_p returns 1, if a register is set in the
;; first insn and used in the dependend insn to form a address.
;;
;;
;; If a intruction uses a register to address memory, it needs
;; to be set 5 cycles in advance.
;;
(define_bypass 5 "z_int,z_agen"
"z_agen,z_la,z_call,z_load,z_store" "s390_agen_dep_p")
;;
;; A load type instruction uses a bypass to feed the result back
;; to the address generation pipeline stage.
;;
(define_bypass 2 "z_load"
"z_agen,z_la,z_call,z_load,z_store" "s390_agen_dep_p")
;;
;; A load address type instruction uses a bypass to feed the
;; result back to the address generation pipeline stage.
;;
(define_bypass 1 "z_larl,z_la"
"z_agen,z_la,z_call,z_load,z_store" "s390_agen_dep_p")
gcc/config/s390/s390-protos.h
......@@ -76,6 +76,8 @@ extern void s390_initialize_trampoline PARAMS ((rtx, rtx, rtx));
extern rtx s390_gen_rtx_const_DI PARAMS ((int, int));
extern rtx s390_simplify_dwarf_addr PARAMS ((rtx));
extern void s390_machine_dependent_reorg PARAMS ((rtx));
extern int s390_agen_dep_p PARAMS ((rtx, rtx));
#endif /* RTX_CODE */
#ifdef TREE_CODE
......
gcc/config/s390/s390.c
......@@ -51,13 +51,17 @@ Boston, MA 02111-1307, USA. */
#include "optabs.h"
static bool s390_assemble_integer PARAMS ((rtx, unsigned int, int));
static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int));
static int s390_adjust_priority PARAMS ((rtx, int));
static void s390_select_rtx_section PARAMS ((enum machine_mode, rtx,
unsigned HOST_WIDE_INT));
static void s390_encode_section_info PARAMS ((tree, int));
static void s390_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT,
HOST_WIDE_INT, tree));
static enum attr_type s390_safe_attr_type PARAMS ((rtx));
static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int));
static int s390_issue_rate PARAMS ((void));
static int s390_use_dfa_pipeline_interface PARAMS ((void));
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
......@@ -75,12 +79,6 @@ static void s390_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT,
#undef TARGET_ASM_SELECT_RTX_SECTION
#define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST s390_adjust_cost
#undef TARGET_SCHED_ADJUST_PRIORITY
#define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
......@@ -89,6 +87,14 @@ static void s390_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT,
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST s390_adjust_cost
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE s390_issue_rate
#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
struct gcc_target targetm = TARGET_INITIALIZER;
extern int reload_completed;
......@@ -936,6 +942,17 @@ const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
ADDR_REGS, NO_REGS, ADDR_REGS
};
/* Return attribute type of insn. */
static enum attr_type
s390_safe_attr_type (insn)
rtx insn;
{
if (recog_memoized (insn) >= 0)
return get_attr_type (insn);
else
return TYPE_NONE;
}
/* Return true if OP a (const_int 0) operand.
OP is the current operation.
......@@ -2892,9 +2909,6 @@ s390_assemble_integer (x, size, aligned_p)
return default_assemble_integer (x, size, aligned_p);
}
#define DEBUG_SCHED 0
/* Returns true if register REGNO is used for forming
a memory address in expression X. */
......@@ -2946,6 +2960,9 @@ addr_generation_dependency_p (dep_rtx, insn)
{
rtx target, pat;
if (GET_CODE (dep_rtx) == INSN)
dep_rtx = PATTERN (dep_rtx);
if (GET_CODE (dep_rtx) == SET)
{
target = SET_DEST (dep_rtx);
......@@ -2958,7 +2975,7 @@ addr_generation_dependency_p (dep_rtx, insn)
{
int regno = REGNO (target);
if (get_attr_type (insn) == TYPE_LA)
if (s390_safe_attr_type (insn) == TYPE_LA)
{
pat = PATTERN (insn);
if (GET_CODE (pat) == PARALLEL)
......@@ -2972,13 +2989,38 @@ addr_generation_dependency_p (dep_rtx, insn)
else
abort();
}
else if (get_attr_atype (insn) == ATYPE_MEM)
else if (get_attr_atype (insn) == ATYPE_AGEN)
return reg_used_in_mem_p (regno, PATTERN (insn));
}
}
return 0;
}
/* Return 1, if dep_insn sets register used in insn in the agen unit. */
int
s390_agen_dep_p(dep_insn, insn)
rtx dep_insn;
rtx insn;
{
rtx dep_rtx = PATTERN (dep_insn);
int i;
if (GET_CODE (dep_rtx) == SET
&& addr_generation_dependency_p (dep_rtx, insn))
return 1;
else if (GET_CODE (dep_rtx) == PARALLEL)
{
for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
{
if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
return 1;
}
}
return 0;
}
/* Return the modified cost of the dependency of instruction INSN
on instruction DEP_INSN through the link LINK. COST is the
......@@ -3012,88 +3054,47 @@ s390_adjust_cost (insn, link, dep_insn, cost)
if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
return cost;
/* DFA based scheduling checks address dependency in md file. */
if (s390_use_dfa_pipeline_interface ())
return cost;
dep_rtx = PATTERN (dep_insn);
if (GET_CODE (dep_rtx) == SET)
{
if (addr_generation_dependency_p (dep_rtx, insn))
{
cost += (get_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
if (DEBUG_SCHED)
{
fprintf (stderr, "\n\nAddress dependency detected: cost %d\n",
cost);
debug_rtx (dep_insn);
debug_rtx (insn);
}
}
}
if (GET_CODE (dep_rtx) == SET
&& addr_generation_dependency_p (dep_rtx, insn))
cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
else if (GET_CODE (dep_rtx) == PARALLEL)
{
for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
{
if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i),
insn))
{
cost += (get_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
if (DEBUG_SCHED)
{
fprintf (stderr, "\n\nAddress dependency detected: cost %d\n"
,cost);
debug_rtx (dep_insn);
debug_rtx (insn);
}
}
if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
}
}
return cost;
}
/* The number of instructions that can be issued per cycle. */
/* A C statement (sans semicolon) to update the integer scheduling priority
INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
increase the priority to execute INSN later. Do not define this macro if
you do not need to adjust the scheduling priorities of insns.
static int
s390_issue_rate ()
{
return 1;
}
A LA instruction maybe scheduled later, since the pipeline bypasses the
calculated value. */
/* If the following function returns TRUE, we will use the the DFA
insn scheduler. */
static int
s390_adjust_priority (insn, priority)
rtx insn ATTRIBUTE_UNUSED;
int priority;
s390_use_dfa_pipeline_interface ()
{
if (! INSN_P (insn))
return priority;
if (s390_cpu == PROCESSOR_2064_Z900)
return 1;
return 0;
if (GET_CODE (PATTERN (insn)) == USE
|| GET_CODE (PATTERN (insn)) == CLOBBER)
return priority;
switch (get_attr_type (insn))
{
default:
break;
case TYPE_LA:
if (priority >= 0 && priority < 0x01000000)
priority <<= 3;
break;
case TYPE_LM:
/* LM in epilogue should never be scheduled. This
is due to literal access done in function body.
The usage of register 13 is not mentioned explicitly,
leading to scheduling 'LM' accross this instructions.
*/
priority = 0x7fffffff;
break;
}
return priority;
}
/* Split all branches that exceed the maximum distance.
Returns true if this created a new literal pool entry.
......
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